The IC design of a high speed RSA processor

Abstract

In this paper, we proposed a new algorithm based on Montgomery 's algorithmrl] to calculate modular multiplication that is the core arithmetic operation in RSA clyptosystem. Since the critical path delay in modular multiplication operation is reduced the new design yielh a very fast implementation. We have implemented a 512-bit single chip RSA processor based on our modified algorithm with Compass 0 . 6~ SPDM cell library. By our modified modular exponentiation algorithm, it takes about 1.5n2 clock cycles to finish one n-bit RSA modular exponentiation operation in our architecture.The simulation results show that we can operate up to 125Mhz, therefore the baud rate of our 512-bit RSA processor is about I64k bitdsec.