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No abstract

In this paper, we proposed a new algorithm based on Montgomery 's algorithmrl] to calculate modular multiplication that is the core arithmetic operation in RSA clyptosystem. Since the critical path delay in modular multiplication operation is reduced the new design yielh a very fast implementation. We have implemented a 512-bit single chip RSA processor based on our modified algorithm with Compass 0 . 6~ SPDM cell library. By our modified modular exponentiation algorithm, it takes about 1.5n2 clock cycles to finish one n-bit RSA modular exponentiation operation in our architecture.The simulation results show that we can operate up to 125Mhz, therefore the baud rate of our 512-bit RSA processor is about I64k bitdsec.

In this paper, a study on the factorization analysis and improvement of the Chinese remainder theorem (CRT) -based multi-prime RSA against the hardware fault attack is carried out. Novel immune CRTbased multi-prime RSA is proposed and its properties in terms of the factorization complexity and operation speed are compared with those of extended CRT-2 protocol [7]. The proposed multi-prime RSA and the extended CRT-2 protocol applied in a three-prime RSA are implemented using FPGA technology. The implementation results show that the proposed immune multi-prime RSA is 30% faster while requiring only 75% of the hardware resources, compared to the extended CRT-2 RSA protocol.