The PowerPC 603 microprocessor: a low-power design for portable applications

Gary, S.; Dietz, C.; Eno, J.; Gerosa, G.; Park, Sung Min; Sanchez, H.

doi:10.1109/cmpcon.1994.282894

Cited by 15 publications

(4 citation statements)

References 2 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Discrete levels of compute activity have been considered in microprocessors for many years to save power. IBM integrated ''Nap,'' ''Doze,'' and ''Sleep'' modes into the PowerPC 750* Microprocessor [31]. Each mode supports a subset of the full resource available.…”

Section: Mips Per Wattmentioning

confidence: 99%

Ultralow-voltage, minimum-energy CMOS

et al. 2006

View full text Add to dashboard Cite

Energy efficiency has become a ubiquitous design requirement for digital circuits. Aggressive supply-voltage scaling has emerged as the most effective way to reduce energy use. In this work, we review circuit behavior at low voltages, specifically in the subthreshold (V dd , V th ) regime, and suggest new strategies for energy-efficient design. We begin with a study at the device level, and we show that extreme sensitivity to the supply and threshold voltages complicates subthreshold design. The effects of this sensitivity can be minimized through simple device modifications and new device geometries. At the circuit level, we review the energy characteristics of subthreshold logic and SRAM circuits, and demonstrate that energy efficiency relies on the balance between dynamic and leakage energies, with process variability playing a key role in both energy efficiency and robustness. We continue the study of energy-efficient design by broadening our scope to the architectural level. We discuss the energy benefits of techniques such as multiple-threshold CMOS (MTCMOS) and adaptive body biasing (ABB), and we also consider the performance benefits of multiprocessor design at ultralow supply voltages.

show abstract

Section: Mips Per Wattmentioning

confidence: 99%

Ultralow-voltage, minimum-energy CMOS

et al. 2006

View full text Add to dashboard Cite

show abstract

“…Turning off a processor has little downside; no excess energy is expended turning the processor back on, the time until it comes back on is barely noticeable, and the state of the processor is unchanged from it turning off and on, unless it has a volatile cache [26]. On the other hand, there is a clear disadvantage to reducing the clock rate: tasks take longer.…”

Section: Hardware Featuresmentioning

confidence: 99%

Software strategies for portable computer energy management

Lorch¹,

Smith²

1998

IEEE Pers. Commun.

202

View full text Add to dashboard Cite

Limiting the energy consumption of computers, especially portables, is becoming increasingly important. Thus, new energy-saving computer components and architectures have been and continue to be developed. Many architectural features have both high performance and low power modes, with the mode selection under software control. The problem is to minimize energy consumption while not significantly impacting the effective performance. We group the software control issues as follows: transition, load-change, and adaptation. The transition problem is deciding when to switch to low-power, reduced-functionality modes. The loadchange problem is determining how to modify the load on a component so that it can make further use of its low-power modes. The adaptation problem is how to create software that allows components to be used in novel, power-saving ways. We survey implemented and proposed solutions to software energy management issues created by existing and suggested hardware innovations.

show abstract

“…For a single word access, only one subarray is used; for a doubleword access, two subarrays are used. Bit lines and output drivers of subarrays not being accessed can be held in a constant state of precharge and the bit line precharge signals can be turned off only when a subarray is being accessed [9]. A doubleword access in this case would require only 1/4 of the energy needed to access the whole cache line.…”

Section: Sub-array Accessmentioning

confidence: 99%

Low-Power Microprocessor Design

Gary¹

1996

Low Power Design Methodologies

View full text Add to dashboard Cite

The selection of low-power microprocessors was in the past limited to low-performance, application-specific products or microcontrollers. Recent industry trends toward portable computers and energy-conscious, or "green," PCs have spurred the development of microprocessors that can achieve a balance between power consumption and performance. This balance must satisfy the broad range of applications included in these new trends, such as notebook computers, personal digital assistants (PDA), and digital personal communicators.Power and performance have generally been at odds in microprocessor design. The design focus has traditionally been on boosting performance with higher frequency operation and additional circuitry for expanded functionality or throughput. The increase in power dissipation accompanying these performance advances was previously a concern only with regard to heat dissipation. Until recently, this could be resolved easily with simple packaging techniques and heat sinks. Since battery operation was not a requirement, the energy source was considered limitless. Features might have been rejected on the basis of additional area if cost was a factor, but seldom were they rejected based on additional power consumed. Power was never a limiting factor in determining performance.

show abstract

The PowerPC 603 microprocessor: a low-power design for portable applications

Cited by 15 publications

References 2 publications

Ultralow-voltage, minimum-energy CMOS

Ultralow-voltage, minimum-energy CMOS

Software strategies for portable computer energy management

Low-Power Microprocessor Design

Contact Info

Product

Resources

About