This paper describes a 160 MHz 500 mW StrongARM microprocessor designed for lowpower, low-cost applications. The chip implements the ARM V4 instruction set 1 and is bus compatible with earlier implementations. The pin interface runs at 3.3 V but the internal power supplies can vary from 1.5 to 2.2 V, providing various options to balance performance and power dissipation. At 160 MHz internal clock speed with a nominal Vdd of 1.65 V, it delivers 185 Dhrystone 2.1 MIPS while dissipating less than 450 mW. The range of operating points runs from 100 MHz at 1.65 V dissipating less than 300 mW to 200 MHz at 2.0 V for less than 900 mW. An on-chip PLL provides the internal clock based on a 3.68 MHz clock input. The chip contains 2.5 million transistors, 90% of which are in the two 16 kB caches. It is fabricated in a 0.35-m three-metal CMOS process with 0.35 V thresholds and 0.25 m effective channel lengths. The chip measures 7.8 mm ϫ 6.4 mm and is packaged in a 144-pin plastic thin quad flat pack (TQFP) package.
The PowerPC 603 microprocessor is designed for low powel; low cost computing applications. A RAM builtin-self-test (BIST) implementation tests the split 8k instruction and data caches and the tag arrays, The design is constrained by the need to minimize area overhead while providing high test coverage and rapid atspeed testing. The solution encompasses a novel state machine design built using logic synthesis tools. This paper presents the RAM BIST design implemented on the PowerPC 603 microprocessol:
Absaact he PowerPC 6 0 P microprocessor is a lowimplementation of the PowerPC Architecture nB0; . superscalar organization includes dynamic localized shutdown of execution units to reduce normal-mode power consumption. Three levels of static low-power operation are sofrware programmable for system power management. The 603' PLL (Phase Lock Loop) is capable of generating an internal processor clock at IX, 2X, 3X or 4X the system clock speed to allow control of system power while maintaining processor performance. krious design features optimize the 603 for both power and performance, creating an ideal microprocessor solution for portable applications.
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