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Absaact he PowerPC 6 0 P microprocessor is a lowimplementation of the PowerPC Architecture nB0; . superscalar organization includes dynamic localized shutdown of execution units to reduce normal-mode power consumption. Three levels of static low-power operation are sofrware programmable for system power management. The 603' PLL (Phase Lock Loop) is capable of generating an internal processor clock at IX, 2X, 3X or 4X the system clock speed to allow control of system power while maintaining processor performance. krious design features optimize the 603 for both power and performance, creating an ideal microprocessor solution for portable applications.

The selection of low-power microprocessors was in the past limited to low-performance, application-specific products or microcontrollers. Recent industry trends toward portable computers and energy-conscious, or "green," PCs have spurred the development of microprocessors that can achieve a balance between power consumption and performance. This balance must satisfy the broad range of applications included in these new trends, such as notebook computers, personal digital assistants (PDA), and digital personal communicators.Power and performance have generally been at odds in microprocessor design. The design focus has traditionally been on boosting performance with higher frequency operation and additional circuitry for expanded functionality or throughput. The increase in power dissipation accompanying these performance advances was previously a concern only with regard to heat dissipation. Until recently, this could be resolved easily with simple packaging techniques and heat sinks. Since battery operation was not a requirement, the energy source was considered limitless. Features might have been rejected on the basis of additional area if cost was a factor, but seldom were they rejected based on additional power consumed. Power was never a limiting factor in determining performance.