Thermal annealing study of Au/TiW metallization on silicon

Baker, J. E.; Blattner, R. J.; Nadel, S.; Evans, C. A.; Nowicki, Ronald S.

doi:10.1016/0040-6090(80)90203-5

Cited by 31 publications

(10 citation statements)

References 8 publications

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“…The gold/titanium-tungsten metallization, deposited by RF diode sputtering on silicon, has been described in prior work (7). It exhibited extensive interdiffusion between the gold and silicon substrate after heat treatment for 30 minutes at 300°C.…”

Section: Resultsmentioning

confidence: 99%

“…This study describes some recent observations made in this connection, which demonstrate that deposition configuration indeed strongly determines resultant barrier properties. They also show that direct current (DC) magnetron sputtered tungsten, deposited in pure argon with substrate rotation into and out of the deposition zone, is a far better diffusion barrier than RF sputtered titanium-tungsten deposited in the static mode (7). Additionally, analytical data are reported which support a proposed model of the deposition parameters governing their barrier properties.…”

mentioning

confidence: 76%

“…The answer to this is probably in the affirmative (1,7). The data presented in Figure 2 suggest that the conditions of deposition, and specifically, whether it is conducted in stationary or rotational mode, may also play a role in impurity incorporation into the resultant films.…”

Section: Discussion and Sununarymentioning

confidence: 97%

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Diffusion barriers between gold and semiconductors

Nowicki

1982

Gold Bull

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The effectiveness of a number ofsemiconductor devices depends on the efficiency with which interdiffusion between the semiconductor and metals, which must be applied to it either as contacts or conductive ijietallizations, can be blocked. Comparisons of the characteristics of the diffusion hamers which can be used between gold and semiconductors -such as those which are made here -therefore have considerable significance.

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Section: Resultsmentioning

confidence: 99%

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confidence: 76%

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Diffusion barriers between gold and semiconductors

Nowicki

1982

Gold Bull

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“…The chips in the 3600C test were removed and cooled to room temperature for operational tests. Ti-W was chosen ws a prelimin 1 1 rier 3600(3 is continui"ng. At 2269 hours in the 3600C test since it is a commonly used barrier with gdld metalliall three oscillators in one package were dbserved to zatibns A diffusion barrier of "as sputterec' TI"W operate at reduced amplitude.…”

Section: Bipolar Silicon Reliabilitymentioning

confidence: 99%

Reliability of High Temperature I2L Integrated Circuits

Dening

Lacombe

Christou

1984

22nd International Reliability Physics Symposium

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Silicon based I2 L circuits have survived a life test for over 5000 hours at 3400C without degradation.These chips used aluminum metallization with current densities below 10,000 amp/sq.cm to avoid electromigration failures. The need for a gold based metal system for high temperature applications has lead to the development of Ti-W diffusion barriers which have withstood temperatures of 3600C for longer than 3500 hours without change. MSI integrated circuits with a Ti-W/Au metallization system have withstood stress tests of over 2000 hours at 3600 C. Gold hillock formation has been shown to be caused by the compressive strains induced in the gold film by thermal expansion mismatches. The driving force for gold hillock formation may be eliminated by depositing the gold film at elevated temperatures. II. INTRODUCTIONIntegrated circuits capable of operating for long periods of time at temperatures as high as 300°C are necessary for several high temperature electronics applications, including aircraft engine controls and geothermal well electronics. Most currently available microcircuits are specified to operate at temperatures no higher than 1250C. This paper describes the status of a program to develop microcircuits which can operate reliably at temperatures as high as 300°C.Early in the program, an evaluation of various microcircuit technologies was conducted to determine which technologies have the capability of operating at these high temperatures. It was found that many existing microcircuits can continue to function at temperatures above 300°C but that 12 L, CMOS/SOS, and dielectrically isolated technologies offered the most promise of supporting a full family of circuit functions. The 12L technology was chosen for further development since the General Electric Company had a radiation hardened I2 L technology which operated at temperatures in excess of 300°C. This paper describes the failure mechanisms which have been found to limit high temperature life and the approaches taken in reducing susceptibility to these mechanisms in order to attain adequate circuit lifetimes. The mechanisms associated with the silicon are considered first, followed by a discussion of the mechanisms associated with the metallization system. During this discussion, the evolution of the technology to its present status and the reasons for choosing the present structure are made clear. The results of life testing of MSI circuits fabricated using the new technology are presented. III. BIPOLAR SILICON RELIABILITYFor this investigation the sources of failure for the high temperature integrated circuits have been divided into: mechanisms affecting the silicon devices and those affecting the metallization and connections to the external world. No problems have been experienced during this program with failures of bipolar silicon semiconductors due to thermal stresses. The processing induced changes during the fabrication cycle (diffusions and oxidations) occur at temperatures around 9000C to 10500C. The reaction rates for the continuation o...

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“…The effectiveness of non-reactive and insoluble tantalum barriers can be improved by adding impurities like oxygen or nitrogen th stuff grain boundaries of the material in order th suppress fast grain boundary diffusion [4]. It is difficult, however to reproducibly improve the effectiveness of barriers by adjusting the level of impurities.…”

Section: Introductionmentioning

confidence: 99%