2015
DOI: 10.1016/j.asoc.2015.04.052
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Thermal-aware floorplanner for 3D IC, including TSVs, liquid microchannels and thermal domains optimization

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Cited by 14 publications
(11 citation statements)
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“…The TSV count, location, dimension, and thermal properties are considered as design parameters to enhance TSV heat transfer. Moreover, when the locations of TSVs are well aligned with other stacked chips, this could work as a thermal path from the heat source to the heat sink [38,[127][128][129][130][131][132][133][134]. For example, thermal TSVs (TTSVs), either integrated with thermal metamaterials or designed using metamaterial principles, can be placed close to hot spot regions to facilitate enhanced heat dissipation in 3D ICs Transactions of the ASME [135], following the principle laid out in Sec.…”
Section: Nonhomogeneousmentioning
confidence: 99%
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“…The TSV count, location, dimension, and thermal properties are considered as design parameters to enhance TSV heat transfer. Moreover, when the locations of TSVs are well aligned with other stacked chips, this could work as a thermal path from the heat source to the heat sink [38,[127][128][129][130][131][132][133][134]. For example, thermal TSVs (TTSVs), either integrated with thermal metamaterials or designed using metamaterial principles, can be placed close to hot spot regions to facilitate enhanced heat dissipation in 3D ICs Transactions of the ASME [135], following the principle laid out in Sec.…”
Section: Nonhomogeneousmentioning
confidence: 99%
“…For 3D packages, thermal metamaterials based on bending or shifting designs could be used to guide the heat efficiently toward heat sinks and facilitate heat dissipation through HBM stacks. Thermal management of 3D stacks could be further addressed by optimal arrangements of TSVs and potential use of silicon-based thermoelectric cooling elements [34,36,37,39,59,61,132,136]. Several studies discussed the potential use of thermal metamaterials for circuit designs [15,19,20,152].…”
Section: Cooling Capacities Of One Package To System Levelmentioning
confidence: 99%
“…Therefore, identifying and correcting the faulty TSVs is necessary to improve the overall yield rate. On the other hand, by having higher operating temperature and high temperature differences between layers [8], the thermal and stress impacts on 3D-ICs reliability are also critical, which can shorten the lifetime expectation. Consequently, there is an imperative need to not only improve the yield rate at the manufacturing phase but also on lifetime reliability due to the vulnerability to the thermal and stress of TSVs.…”
Section: Introductionmentioning
confidence: 99%
“…Despite having numerous methods to solve the reliability issues of TSVs, they mostly focus on offline testing and recovery in three phases: pre-bond, post-bond and postproduction. However, the high operating temperature is one of the critical issues of 3D-IC [8]. The fault rates are expected to exponentially accelerate with the operating temperatures in most academic and industry models [24], [25].…”
Section: Introductionmentioning
confidence: 99%
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