One of the key technologies for developing three-dimensional (3-D) packaging with vertical interconnection is the interlayer metallization using through-Si vias (TSVs). In the present work, via holes are filled with Cu by using electroplating. The thickness profiles of the seed layers have a significant effect on via filling in the subsequent electroplating process. In this work, Cu seed layers were deposited by ionized metal plasma (IMP) sputtering, which enables more conformal deposition of the seed layers, especially on the sidewalls of the via holes, than conventional sputtering. The thickness profiles of the seed layers inside via holes were closely examined as a function of substrate bias power. The effects of seed layer on the via filling in the electroplating process were studied for fine via holes with various diameters of 4–10 µm and aspect ratios of 6.6–11. Complete filling of very fine vertical via holes with aspect ratios as high as 8.7 was achieved without defects by using IMP sputtering and Cu electroplating.