Thermal transient characterization methodology for single-chip and stacked structures

Steffens, Oliver; Szabó, Péter; Lenz, Michael; Farkas, G.

doi:10.1109/stherm.2005.1412198

Cited by 48 publications

(16 citation statements)

References 8 publications

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“…After this point we see fast rise in the temperature for the NG boundary where the air gap represents an important obstacle in the heat-flow. Using the NID method, these transient responses can be easily turned into structure functions, which describe the heat-flow path in terms of thermal resistances and corresponding thermal capacitances [6,7,8]. The cumulative structure function gives information on the volume of the material in which the heat spreads, while its other view, the differential structure function is proportional to the area of the spreading cone.…”

Section: Sampleidmentioning

confidence: 99%

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Issues in junction-to-case thermal characterization of power packages with large surface area

Vass-Várnai

Gao

Sárkány

et al. 2010

2010 26th Annual IEEE Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM)

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There are several ways to define the junction-to-case thermal resistance; however, it is rather challenging to characterize the heat-flow in a package by a single number in an accurate and reproducible way. For many power package families such as TO-type packages the thermal transient testing and the so-called dual interface method can give reliable results.The diverging point of structure functions from dual thermal transients gives a good picture of the material interfaces in such structures. However, the location and nature of the diverging point strongly depends on the shape and direction of the heat-spreading. If the package area is much larger than the dissipating chip the shape of the heat-flow changes when using different interfaces [1,2]. This causes structure functions corresponding to the two setups deviate much before reaching the case surface. In this paper the origin of this phenomenon is investigated.Measurement and simulation results are compared on different large IGBT modules with several modifications in their structure enabling a detailed analysis of the heat-flow path. A comparison is given between heating only a small fraction of a large module and heating all chips. Some samples went through thermal cycling reliability tests which resulted in cracks below the chips. The effect of the reduced die-attach area is visualized with the help of structure functions. KeywordsJunction-to-case thermal resistance, thermal transient testing, dual interface methodology, large substrate area power modules Problems to be addressed

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Section: Sampleidmentioning

confidence: 99%

“…References [5] and [6] suggest an inflexion point approach to find an average Rth corresponding to an effective cooling capability. Now point 6 shows the simple numerical average between the two extreme volumes.…”

Section: Comparison Of the Test Samplesmentioning

confidence: 99%

Issues in junction-to-case thermal characterization of power packages with large surface area

Vass-Várnai

Gao

Sárkány

et al. 2010

2010 26th Annual IEEE Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM)

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“…Various features (areas of higher or lower gradient usually) of a structure function curve can be directly mapped to physical objects in a device [1] and as such structure function comparison analysis has been used to determine issues with manufacturing processes and to identify causes of thermal performance degradation and failure. [2,3,4,5] The concept of mapping structure function features to physical objects makes these curves a convenient format to compare simulation results to experimental data for simulation model calibration purposes. Any mismatch can be associated with a specific model object or objects, providing insight as to what aspects of the simulation model need to be corrected.…”

Section: Introductionmentioning

confidence: 99%

Automatic calibration of detailed IC package models

Blackmore¹

2016

2016 32nd Thermal Measurement, Modeling &Amp; Management Symposium (SEMI-THERM)

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Structure function based simulation model calibration has become common in the electronics cooling industry. Verifying that a model can produce a simulated structure function curve that matches an experimental structure function is valuable to the analyst, as it confirms the simulation model will respond correctly to any power stimulus for a particular application. Structure function based model calibration has typically been a manual process and required a high level of domain knowledge to be successful. The present work introduces a method to reduce structure function based calibration into an optimization problem and discusses the associated work flow.

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“…Comparison of an experimentally measured structure function (SF) to a verified reference example can be used to judge issues such as manufacturing process quality and operational degradation as a leading indicator of a catastrophic failure [1,2,3,4].…”

Section: Introductionmentioning

confidence: 99%

A detailed IC package numerical model calibration methodology

Bornoff

Vass-Várnai

2013

29th IEEE Semiconductor Thermal Measurement and Management Symposium

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Experimentally derived structure functions can be used to provide insights into the thermal resistances and capacitances heat experiences as it travels from a die through and beyond an IC package.A 3D "detailed" numerical model of the package that purports to explicitly represent the internal construction of the package requires material properties and geometric sizes to be accurately specified. A structure function derived from simulating the detailed numerical model can itself be compared to the experimentally derived reference example. Deviations between experimental and numerical SFs indicate error sites within the detailed model and an indication of whether the thermal resistances or thermal capacitances of the numerical would need to be increased or decreased to match the experimentally observed values. Iterative modifications of the detailed model, based on successive structure function comparisons, will achieve a fully calibrated detailed numerical package model. Keywords NomenclatureSF -Structure Function R -Thermal Resistance (degC/W) C -Thermal Capacitance (J/DegC) Tj -Junction Temperature (degC)

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Thermal transient characterization methodology for single-chip and stacked structures

Cited by 48 publications

References 8 publications

Issues in junction-to-case thermal characterization of power packages with large surface area

Issues in junction-to-case thermal characterization of power packages with large surface area

Automatic calibration of detailed IC package models

A detailed IC package numerical model calibration methodology

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