Thermomechanical models for leadless solder interconnections in flip chip assemblies

Vandevelde, Bart; Christiaens, F.; Beyne, Eric; Roggen, J.; Peeters, Joris; Allaert, K.; Vandepitte, Dirk; Bergmans, J

doi:10.1109/95.679047

Cited by 28 publications

(10 citation statements)

References 6 publications

(2 reference statements)

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“…In addition, most global models assume that bending stresses are insignificant and the bending moments serve to accommodate some of the global expansion mismatch, thus reducing the shear stress magnitude in the joint [3,4]. Vandevelde et al [16] developed a more sophisticated global model that also includes the bending stresses. In reality, however, the interfacial shear and peel stresses have complex distributions that cannot be captured by global models.…”

Section: Introductionmentioning

confidence: 99%

Interfacial thermal stresses in solder joints of leadless chip resistors

Ghorbani

Spelt

2006

Microelectronics Reliability

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Section: Introductionmentioning

confidence: 99%

Interfacial thermal stresses in solder joints of leadless chip resistors

Ghorbani

Spelt

2006

Microelectronics Reliability

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“…The stresses in turn are determined by the geometry of the interconnects and the load. Thermal cycling of the assembly results in failure from fatigue, typically estimated from Fatigue Life (3) where is the length of the die and is the height of the interconnect. Equation (3) uses beam theory to estimate the strain from the global CTE mismatch and is a generic representation that approximately holds true for vertical interconnections between two devices.…”

Section: B Barriers For Thermomechanical Reliabilitymentioning

confidence: 99%

“…Fig. 2 shows the thermally induced stresses in the assembly with peripheral array connections with a low stiffness polymer ( GPa) calculated from an analytical thermomechanical model based on beam theory [3]. The thermal load was induced by cooling from 185 C to 25 C. The die size was 5 mm and the pitch was chosen as 40 m. As shown in Fig.…”

Section: B Barriers For Thermomechanical Reliabilitymentioning

confidence: 99%

“…4 shows the interfacial shear stresses using different interconnect materials. The stresses were computed by modeling the IC board interconnects using elastic beam theory [3]. The use of low stiffness interconnects can lower the stresses at the interface to possibly within the elastic limit of the interconnection material and potentially increase the reliability even with vertical structures that are easy to fabricate and provide excellent electrical properties.…”

Section: Metal-polymer Composite Interconnectionsmentioning

confidence: 99%

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Metal–Polymer Composite Interconnections for Ultra Fine-Pitch Wafer Level Packaging

Aggarwal

Raj

Tummala

2007

IEEE Trans. Adv. Packag.

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The decrease in feature sizes of microelectronic devices has underlined the need for higher number of input-outputs (I/Os) in order to increase its functionality. This has spurred a great interest in developing electronic packages with fine and ultra fine pitches (20-100 m). Most of the compliant interconnects that are currently being developed have inductance and resistance higher than desirable. This paper presents a novel low-temperature fabrication process that combines polymer structures with electroless copper plating to create low stress composite structures for extremely fine-pitch wafer level packages. Analytical models for these structures justify the stress reduction at the interfaces and superior reliability as integrated circuit (IC)-package interconnects. Low coefficient of thermal expansion (CTE) polyimide structures with ultra-low stress, high toughness, and strength were fabricated using plasma etching. The dry etching process was tuned to yield a wall angle above 80 . The etching process also leads to roughened sidewalls for selective electroless copper plating on the sidewalls of polymer structures. This work also describes a selective electroless plating synthesis route to develop thin IC-package bonding interfaces with lead-free solder. Lead-free alloy films were deposited from aqueous plating solutions consisting of suitable metal salts and reducing agents at 45 C. The lead-free solder composition was controlled by altering the plating bath formulation. Solder film formed from the above approach was demonstrated to bond the metal-coated polymer interconnects with the copper pads on the substrate using a standard reflow process. Metal-coated polymer structures in conjunction with the thin solder bonding films can provide low-cost high-performance solutions for wafer-level packaging.

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“…Shear Force Allocation: Vandevelde [10] proposed an analytical thermomechanical model to calculate thermally induced shear force in the solder balls of an area array package. In the present work, Vandevelde's [10] approach has been used to determine instead of the DNP formulae.…”

Section: Failure Mechanics Based Closed Form Modelmentioning

confidence: 99%

Thermo-mechanical reliability tradeoffs for deployment of area array packages in harsh environments

Lall

Singh

Suhling

et al. 2005

IEEE Trans. Comp. Packag. Technol.

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Fine-pitch ball grid arrays (BGAs) and underfills have been used in benign office environments and wireless applications for a number of years, however their reliability in harsh environments is not well understood. In this work, the design guidelines development effort for deployment of fine-pitch ball-grid array packages in the harsh environments have been presented. Guidelines are targeted toward government contractors, OEMs, and third party contract manufacturers who intend to select part architectures and board designs based on specified mission requirements. The guidelines are intended as an aid for understanding the sensitivity of component reliability to geometry, package architecture, material properties and board attributes in different thermal environments in order to quantitatively evaluate the impact of these parameters on the component reliability. The intent is to develop a tool for doing tradeoffs between geometry, materials and quantitatively evaluating the impact on reliability. Sensitivity relations for geometry, materials, and architectures based on statistical models and failure mechanics based closed form models have been developed. Convergence between statistical model sensitivities and failure mechanics based sensitivities has been demonstrated. Predictions of sensitivities have been validated against experimental test data.Index Terms-Ball grid array (BGA), design guidelines, solder joint fatigue, statistical model, thermal reliability prediction.

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Thermomechanical models for leadless solder interconnections in flip chip assemblies

Cited by 28 publications

References 6 publications

Interfacial thermal stresses in solder joints of leadless chip resistors

Interfacial thermal stresses in solder joints of leadless chip resistors

Metal–Polymer Composite Interconnections for Ultra Fine-Pitch Wafer Level Packaging

Thermo-mechanical reliability tradeoffs for deployment of area array packages in harsh environments

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