Thin-Piezo on Single-Crystal Silicon Reactive Etched RF MEMS Resonators

Abstract

This paper demonstrates how a single crystal silicon wafer can be used to fabricate thin-film piezoelectric-on-silicon (TPoS) resonators by utilizing a modified version of Single Crystal Silicon Reactive Etch and Metallization (SCREAM) process. The developed process enables the fabrication of MEMS resonators with varied device layer thicknesses ranging from sub-micrometer to tens of micrometers (one thickness per die) from a single bulk silicon wafer, while avoiding the need of costly silicon-on-insulator (SOI) substrates. The thin-film piezoelectric on single-crystal silicon reactive etched technique allows batch fabrication of TPoS resonators, while also retaining the same number of photolithography steps. To maintain a good resonator body sidewall roughness, a conformal Al2O3 thin film was deposited by atomic layer deposition to act as the sidewall protection layer. Through the developed process, resonators with varied silicon layer ranging from 0.1µm to 47µm have been successfully implemented. The measured results under different ZnO-to-Si thickness ratios have been studied, in terms of motional impedance (Rm), quality factor (Q), and resonance frequency. It is noted that TPoS MEMS resonators operating in fundamental and higher lateral extensional modes exhibit its best performance under an optimal ZnO-to-Si thickness ratio. Resonators fabricated by the modified TPoS process with a Si device layer thickness of 4-20 µm exhibits optimal performance. The highest Q of 1,567 for a disk resonator and the lowest motional impedance of 791 Ω for a square plate resonator were achieved with Si layer thicknesses of 20 m and 4 µm, respectively.

Lateral Extensional Mode Piezoelectric ZnO-on-Nickel RF MEMS Resonators for Back-End-of-Line Integration

“…Thereafter, the fourth mask is used to generate an opening for the release process while protecting the devices. Finally, resonators are suspended by an isotropic dry etching of the amorphous Si sacrificial layer ( Figure 2 d) [ 23 , 24 , 25 , 26 , 27 ].…”

“…Pt top elect are defined via a lift-off process using the third mask (Figure 2c). Thereafter, the mask is used to generate an opening for the release process while protecting the de Finally, resonators are suspended by an isotropic dry etching of the amorphous Si s cial layer (Figure 2d) [23][24][25][26][27].…”

“…Pt t are defined via a lift-off process using the third mask (Figure 2c). Thereaft mask is used to generate an opening for the release process while protecting Finally, resonators are suspended by an isotropic dry etching of the amorph cial layer (Figure 2d) [23][24][25][26][27]. Micromachines 2023, 14, x FOR PEER REVIEW 4 In this work, the electrolyte nickel electroplating process was performed in the n electroplating solution heated to ~60 °C, which was low enough to enable the post-CMOS rication of MEMS devices.…”

MEMS Humidity Sensors

“…Thin-film piezoelectric-on-substrate (TPoS) resonators based on ZnO have a considerable prospect to be used in mass or gas sensing applications. TPoS resonators are strategically coupled with low loss substrates like Si to have higher acoustic velocities and to store more energy which results in increasing the equivalent acoustic velocity to be higher than typical piezoelectric resonators [15]. Based on a previous study [16], the effects of mass loading on TPoS based resonators have shown high sensitivity of the first and fourth-order contour mode ZnO-on-Si MEMS resonator-based mass sensor, which provides massive potential in mass sensing applications.…”

Recent Advances in Reactive Ion Etching and Applications of High-Aspect-Ratio Microfabrication

“…DRIE etching has developed to the point where the etch rates are sufficient for production [ 35 ]. DRIE is now commonly used for bulk micromachining of single-crystal silicon for a wide range of applications—inertia sensors [ 47 , 48 , 49 , 50 , 51 ], pressure sensors [ 52 , 53 , 54 ], microphones [ 55 ], resonators [ 56 ], microfluidics [ 57 , 58 , 59 ], and others [ 60 , 61 ].…”