Tool for Automated Instruction Set Characterization for Software Power Estimation

Wendt, M.; Grumer, Matthias; Steger, Christian; Weiß, Reinhold; Neffe, Ulrich; Muehlberger, A.

doi:10.1109/tim.2009.2021646

Cited by 5 publications

(5 citation statements)

References 12 publications

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“…K i and n i are measured by simulating the program on a VHDL model of a processor. Wendt et al (2010) propose an automated method for characterizing the instruction set. They decompose the energy per clock cycle into four parts: instructiondependent, data-dependent, cache energy dissipation and the dissipation of other external components.…”

Section: Data Dependent Approachesmentioning

confidence: 99%

Processor power estimation techniques: a survey

Sultan¹,

Ananthanarayanan²,

Sarangi³

2014

IJHPSA

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Since the end of the nineties, power dissipation has been regarded as a first order design constraint in processors. Increased power dissipation along with the resultant rise in die temperature is considered as the single largest bottleneck for increasing processor frequency and complexity. Consequently, it is very important from both a technical as well as commercial perspective to accurately estimate processor power such that designers can tailor their architecture, software and systems to minimize power consumption. In this paper, we provide a survey of most of the processor specific power estimation techniques proposed after the mid nineties. In specific, we look at estimating power both at design time as well as runtime. The former approach is more suitable for early stage architectural exploration, and the latter approach is more germane to creating power efficient application software. We broadly focus on estimating power using system level models, architectural simulation, hardware performance counters, on-chip temperature profiles, and program execution profiles. We showcase a broad range of methods for power estimation using simulators, compilers, profilers, and sophisticated mathematical analysis routines.

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Section: Data Dependent Approachesmentioning

confidence: 99%

Processor power estimation techniques: a survey

Sultan¹,

Ananthanarayanan²,

Sarangi³

2014

IJHPSA

View full text Add to dashboard Cite

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“…This improves the flexibility of such a measurement system. We use a similar measurement setup as used for [12].…”

Section: Related Workmentioning

confidence: 99%

A system for accurate characterization of wireless sensor networks with power states and energy harvesting system efficiency

Glatz

Hormann

Steger

et al. 2010

2010 8th IEEE International Conference on Pervasive Computing and Communications Workshops (PERCOM Workshops)

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Wireless sensor network (WSN) nodes have to cope with severe power supply constraints. Energy harvesting system (EHS) technology is used for prolonging network lifetime. Robust operation of such systems heavily relies on accurate models of EHS efficiency and node power dissipation for calculating sustainable operation modes. A node's energy balance can be described with a power state model (PSM). While for battery operated WSNs PSM mea surement errors and battery effects have to be considered, this paper widens the point of view to EHS properties. We analyze varying PSMs at runtime, EHS efficiency and measurement error's impacts on duty cycled WSNs.We show a measurement system setup and results from profiling a PSM for Mica2 nodes with an EHS. We explain important considerations for such systems with showing the variance of a node's energy consumption depending on its supply and we profile EHS efficiency for deducing an energy storage level operating point.The results contribute to problems in the field of low power WSNs and especially EHS supported ones. Robustness of duty cycled WSNs heavily depends on measurement error bounds and is impacted by EHS efficiency. The reader is provided with a methodology for measuring and modeling robust WSNs.

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“…The project LOWSOM1 1 implemented an environment for automated instruction set characterization (Wendt et al, 2010). Based on a detailed instruction set description a testbench generator creates all needed test programs for a complete characterization.…”

Section: Related Workmentioning

confidence: 99%

Power-aware hardware/software codesign of mobile devices

Steger

Bachmann

Genser

et al. 2010

Elektrotech. Inftech.

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Power-aware hardware/software codesign defines a design methodology for the development of energy efficient embedded systems. With the appearance of energy-harvesting devices or RF-powered smart cards in recent years, the focus of the design process has been shifting from purely energy-oriented to power-constraints-oriented optimization strategies.In this paper we present an overview of various codesign flows and we motivate the importance of power awareness in today's design processes. Moreover, the industrial relevance of hardware/software codesign is shown in a case study of an RF-powered smart card system. Keywords: power awareness; hardware/software codesign; smart cards; power emulation Power-aware Hardware/Software Codesign fü r mobile Systeme.Power-aware Hardware/Software Codesign definiert eine Design-Methode fü r die Entwicklung energieeffizienter, eingebetteter Systeme. Durch das verstä rkte Aufkommen von Gerä ten, die ihre Energie aus der Umgebung beziehen ("Energy Harvesting") oder kontaktlos ü ber ein RF-Feld versorgt werden, hat sich auch der Fokus des Designprozesses verlagert. Statt sich ausschließlich auf die Energieoptimierung zu konzentrieren, mü ssen nun auch immer stä rker Einschrä nkungen bezü glich der Leistungsaufnahme berü cksichtigt werden.In diesem Artikel werden verschiedene Codesign-Flows vorgestellt und deren Bedeutung in der Entwicklung von leistungs-und energieeffizienten Systemen unterstrichen. Darü ber hinaus wird die industrielle Relevanz des Hardware/Software Codesigns anhand eines konkreten Anwendungsfalls in der Anwendungsdomä ne von kontaktlosen Chipkarten gezeigt.

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Tool for Automated Instruction Set Characterization for Software Power Estimation

Cited by 5 publications

References 12 publications

Processor power estimation techniques: a survey

Processor power estimation techniques: a survey

A system for accurate characterization of wireless sensor networks with power states and energy harvesting system efficiency

Power-aware hardware/software codesign of mobile devices

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