Towards the System-on-Chip Realization of a Sensorless Vector Controller with Microsecond-order Computation Time

Abstract

Abstract-The aim of this research is to implement sensorless vector control algorithms on a single, eventually reconfigurable, chip, with a computation timing constraint of, at most, 1-6 microseconds, and a concern for implementation cost. In this article, we discuss the implementation problems and tradeoffs involved in meeting these goals on Field-Programmable Gate Arrays (FPGAs). To be able to fit a complete induction motor vector controller on a single, inexpensive FPGA chip, we estimate the area/time requirements of each module involved in sensorless vector control. We discuss, in particular, the tradeoffs of implementing the key modules, the speed and flux observers and the Clarke and Park transformations. The speed and flux observers here under consideration are extended Kalman filter-based.

High-Speed CurrentdqPI Controller for Vector Controlled PMSM Drive

“…Moreover, it shows that this work can accomplish the transformation within 2 clock cycles which means that the execution time is as low as 50 ns in 40 MHz frequency. The execution time required in this proposed solution is much smaller than research from [ 18 – 20 ]. The proposed design required no memory resources as required in [ 20 ].…”

“…The research proposed the idea of realizing a high-speed current dq PI controller into FPGA but did not show any results [ 17 ]. Beguenance et al showed the hardware implementation of a current controller in a FOC PMSM drive [ 18 ]. The research implemented the PI controller along with a decoupling method for controlling dq -axis current of a FOC PMSM drive.…”