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Abstract-Public key cryptography often involves modular multiplication of large operands (160 up to 2048 bits). Several researchers have proposed iterative algorithms whose internal data are carry-save numbers. This number system is unfortunately not well suited to today's Field Programmable Gate Arrays (FPGAs) embedding dedicated carry logic.We propose to perform modular multiplication in a high-radix carry-save number system, where the sum bit of the well-known carry-save representation is replaced by a sum word. Two digits are then added by means of a small Carry-Ripple Adder (CRA). The originality of our approach is to analyze the modulus in order to select the most efficient high-radix carry-save representation.

Abstract-The aim of this research is to implement sensorless vector control algorithms on a single, eventually reconfigurable, chip, with a computation timing constraint of, at most, 1-6 microseconds, and a concern for implementation cost. In this article, we discuss the implementation problems and tradeoffs involved in meeting these goals on Field-Programmable Gate Arrays (FPGAs). To be able to fit a complete induction motor vector controller on a single, inexpensive FPGA chip, we estimate the area/time requirements of each module involved in sensorless vector control. We discuss, in particular, the tradeoffs of implementing the key modules, the speed and flux observers and the Clarke and Park transformations. The speed and flux observers here under consideration are extended Kalman filter-based.

Hardware implementation of mechatronic systems become more and more feasible with the constant development of simulation software tools and more performing computer hardware. The work presented here explains the use of Matlab/Simulink and Xilinx System Generator tools and FPGA hardware in designing, simulating and evaluating control laws for mechatronic systems. Particularly, this paper reports improved results for FPGA implementation and hardware/software co-simulation of a rotor flux-oriented control loop for three-phase AC induction motors. On FPGA, the computation time achieved for the complete control loop proves to be short enough that many enhancements proposed in theory become possible, including the use of neural networks, matrix calculations, on-line monitoring, advanced control of PWM inverter-fed AC machines, and multiple hybrid controls, without affecting system performance or sacrificing precision.