Trade-off and process consideration for scalable poly-Si buffered LOCOS technology

Juang, Miin‐Horng

doi:10.1016/s0038-1101(99)00163-x

Cited by 1 publication

(2 citation statements)

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“…This would lead to dislocation formation, degrading the integrity of junction and thin gate oxide. On the other hand, in the LOCOS technology, for reducing the bird's beak length without inducing the extra stress, poly-Si buffer LOCOS technology has been employed to meet the requirement [7][8][9][10][11]. During the field oxidation, the rigidity of nitride inhibits the lateral oxygen diffusion.…”

Section: Introductionmentioning

confidence: 99%

“…And, resultantly the volume expansion of grown field oxide near the bird's beak edge would pull apart the silicon lattice, creating defects in the Si substrates unless a stress-relief layer is sandwiched between nitride and pad oxide. The poly-Si, due to its soft property, is squeezable and capable of relaxing the stress [7][8][9][10][11]. As a result, poly-Si is generally used to absorb the stress.…”

Section: Introductionmentioning

confidence: 99%

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Study of shallow trench isolation technology with a poly-Si sidewall buffer layer

Juang

Chen²,

Jang³

2007

Semicond. Sci. Technol.

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Shallow trench isolation (STI) technology with a poly-Si buffer layer at the trench sidewall has been studied. At the densification temperature of 950 • C, for the samples without using a poly-Si buffer layer, the resulting junction shows a leakage of about 700 nA cm −2 for a diode area of 100 × 100 µm 2 , primarily due to large peripheral junction leakage. The large leakage is ascribed to the defect generation caused by a thermally induced stress near the trench sidewall. The usage of a poly-Si buffer layer in the trench sidewall is found to significantly improve the junction characteristics. As a result, when a 40 nm poly-Si buffer layer is sandwiched between the Si substrate and the trench-fill silicon oxide, the resultant junctions show a leakage of only about 8 nA cm −2 . This result may reflect the considerably reduced thermally induced stress near the trench sidewall. Furthermore, at the densification temperature of 1100 • C, the usage of a poly-Si buffer layer can help to achieve excellent junctions with a leakage smaller than 5 nA cm −2 for a diode area of 100 × 100 µm 2 .

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Section: Introductionmentioning

confidence: 99%