2006
DOI: 10.1155/wcn/2006/43917
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Transceiver Design for Multiband OFDM UWB

Abstract: Ultra-wideband (UWB) is an emerging broadband wireless technology enabling data rates up to 480 Mbps. This paper provides an overview of recent design approaches for several circuit functions that are required for the implementation of multiband OFDM UWB transceivers. A number of transceiver and synthesizer architectures that have been proposed in literature will be reviewed. Although the technology focus will be on CMOS, also some design techniques implemented in BiCMOS technologies will be presented.

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Cited by 16 publications
(6 citation statements)
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“…Other approaches avoid the problems associated with SSB mixing completely, by having a separate PLL for each band as in (Razavi et al, 2005), where three PLLs are used to generate the required signals for bands 1 to 3. Alternative architectures (Roovers et al (2005), Leenaerts (2005), Lee & Chiu (2005), Liang et al (2006), Lee (2006), Leenaerts (2006), Pufeng et al (2010)) can be found in literature using a number of PLLs working in parallel. The architecture proposed in (Roovers et al, 2005) and (Leenaerts, 2005) uses 2 PLLs: one PLL generates a quadrature 3960 MHz signal while the other PLL generates a quadrature 528 MHz signal.…”
Section: Architecturesmentioning
confidence: 99%
“…Other approaches avoid the problems associated with SSB mixing completely, by having a separate PLL for each band as in (Razavi et al, 2005), where three PLLs are used to generate the required signals for bands 1 to 3. Alternative architectures (Roovers et al (2005), Leenaerts (2005), Lee & Chiu (2005), Liang et al (2006), Lee (2006), Leenaerts (2006), Pufeng et al (2010)) can be found in literature using a number of PLLs working in parallel. The architecture proposed in (Roovers et al, 2005) and (Leenaerts, 2005) uses 2 PLLs: one PLL generates a quadrature 3960 MHz signal while the other PLL generates a quadrature 528 MHz signal.…”
Section: Architecturesmentioning
confidence: 99%
“…Although the nominal bandwidth of I and Q channels is reduced from 1 GHz to 500 MHz by using direct-conversion architecture, the required bandwidth is still large and therefore is the main baseband design challenge [4]. On the other hand, this large bandwidth makes possible to realize high-order passive on-chip filters, be- cause the required components are physically small [12].…”
Section: The Analog Baseband Chainmentioning
confidence: 99%
“…The overall filtering requirements can be estimated assuming the closest 802.11a interferer located only 1.15 GHz away from the carrier frequency of 4 GHz (5.15-4 GHz) at a distance of 0.2 m while the wanted UWB signal is at 10 m distance. Therefore, the filter has to provide more than 35 dB of attenuation relative to DC at 1.15 GHz offset [4]. The filtering requirements can be accomplished with a fifth order Chebyshev filter.…”
Section: The Analog Baseband Chainmentioning
confidence: 99%
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“…16 shows the die photography of the DIIL-divider in the synthesizer, which is designed and fabricated in TSMC 0.18-µm CMOS process with 6 metal layers.…”
mentioning
confidence: 99%