Transfer techniques for single-crystal silicon/germanium nanomembranes and their application in flexible electronics

Li, Gongjin; Guo, Qinglei; Huang, Gaoshan; Mei, Yongfeng

doi:10.1360/n112018-00084

Cited by 2 publications

(1 citation statement)

References 98 publications

(136 reference statements)

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“…Therefore, it is extremely urgent to integrate monocrystalline silicon devices and compound semiconductor devices through heterogeneous integration to meet the development requirements of ultra-miniaturization, intelligence, and diversification of electronic systems, and to break through the limitations of silicon bulk materials. There are several methods in the current stage of heterogeneous integration technology, such as epitaxial growth, bonding, three-dimensional packaging, and transfer printing [2][3][4][5][6][7][8][9]. This article mainly studies the transfer technology applied in the field of heterogeneous integration.…”

Section: Introductionmentioning

confidence: 99%

Optimization of Sacrificial Layer Etching in Single-Crystal Silicon Nano-Films Transfer Printing for Heterogeneous Integration Application

Zhang

Yang

et al. 2021

Nanomaterials

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As one of the important technologies in the field of heterogeneous integration, transfer technology has broad application prospects and unique technical advantages. This transfer technology includes the wet chemical etching of a sacrificial layer, such that silicon nano-film devices are released from the donor substrate and can be transferred. However, in the process of wet etching the SiO2 sacrificial layer present underneath the single-crystal silicon nano-film by using the transfer technology, the etching is often incomplete, which seriously affects the efficiency and quality of the transfer and makes the device preparation impossible. This article analyzes the principle of incomplete etching, and compares the four factors that affect the etching process, including the size of Si nano-film on top of the sacrificial layer, the location of the anchor point, the shape of Si nano-film on top of the sacrificial layer, and the thickness of the sacrificial layer. Finally, the etching conditions are obtained to avoid the phenomenon of incomplete etching of the sacrificial layer, so that the transfer technology can be better applied in the field of heterogeneous integration. Additionally, Si MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistors) on sapphire substrate were fabricated by using the optimized transfer technology.

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Section: Introductionmentioning

confidence: 99%

Optimization of Sacrificial Layer Etching in Single-Crystal Silicon Nano-Films Transfer Printing for Heterogeneous Integration Application

Zhang

Yang

et al. 2021

Nanomaterials

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Investigations on Cylindrical Surrounding Double-gate (CSDG) Mosfet using ALXGA1-XAS/INP: PT with LA2O3 Oxide Layer for Fabrication

Gowthaman

Srivastava

2024

NANOTEC

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Introduction: The Cylindrical Surrounding Double-Gate MOSFET has been designed using Aluminium Gallium Arsenide in its arbitrary alloy form alongside Indium Phosphide with Lanthanum Dioxide as a high-ƙ dielectric material. Introduction: The Cylindrical Surrounding Double-Gate MOSFET has been designed using Aluminium Gallium Arsenide in its arbitrary alloy form alongside Indium Phosphide with Lanthanum Dioxide as a high-ƙ dielectric material. Method: The heterostructure based on the AlxGa1-xAs/InP: Pt has been used in the design and implementation of the MOSFET for RF applications. Platinum serves as the gate material, which has higher electronic immunity toward the Short Channel Effect and highlights semiconductor properties. The charge buildup is the main concern in the field of MOSFET design when two different materials are considered for fabrication. The usage of 2 Dimensional Electron Gas has been outstanding in recent years to help the electron buildup and charge carrier accumulation in the MOSFETs regime. Device simulation used for the smart integral systems is an electronic simulator that uses the physical robustness and the mathematical modeling of semiconductor heterostructures. In this research work, the fabrication method of Cylindrical Surrounding Double Gate MOSFET has been discussed and realized. The scaling down of the devices is essential to reduce the area of the chip and heat generation. By using these cylindrical structures, the area of contact with the circuit platform is reduced since the cylinder can be laid down horizontally. Result: The coulomb scattering rate is observed to be 18.3 % lower than the drain terminal when compared to the source terminal. Also, at x = 0.125 nm, the rate is 23.9 %, which makes it the lowest along the length of the channel; at x = 1 nm, the rate is 1.4 % lesser than that of the drain terminal. A 1.4 A/mm2 high current density had been achieved in the channel of the device, which is significantly larger than comparable transistors. Conclusion: The conventional transistor occupies a larger area than the proposed cylindrical structures transistor and is also efficient in RF applications.

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Transfer techniques for single-crystal silicon/germanium nanomembranes and their application in flexible electronics

Abstract: et al. Transfer techniques for single-crystal silicon/germanium nanomembranes and their application in flexible electronics (in Chinese).

Cited by 2 publications

References 98 publications

Optimization of Sacrificial Layer Etching in Single-Crystal Silicon Nano-Films Transfer Printing for Heterogeneous Integration Application

Optimization of Sacrificial Layer Etching in Single-Crystal Silicon Nano-Films Transfer Printing for Heterogeneous Integration Application

Investigations on Cylindrical Surrounding Double-gate (CSDG) Mosfet using ALXGA1-XAS/INP: PT with LA2O3 Oxide Layer for Fabrication

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