“…The circuit model presents a maximum average error of 5.1% for the return loss (i.e., jS 11 j) when compared with experimental data. Furthermore, with the purpose of measuring the impact of these inter-metallic elements in the performance of RF applications [16,17,18,19,20,21], the via stack circuit model is applied here for representing a RTWO. The importance of this particular application example relies on the fact that this type of oscillators allow fulfilling the design requirements for high frequencies applications (i.e.…”