Transient liquid phase (TLP) bonding for microsystem packaging applications

Welch, W.C.; Chae, Junseok; Lee, Sang‐Hyun; Yazdi, N.; Najafi, K.

doi:10.1109/sensor.2005.1497331

Cited by 18 publications

(15 citation statements)

References 8 publications

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“…Their electrical and mechanical properties were compared under different bonding conditions. Also, an indium bonding layer was applied to minimize the bonding temperature due to its low melting point of 156.6°C and its reduced diffusion bonding temperature with copper at 180°C resulting in a remelting temperature of >307°C [20]. Thus, a lower resistance joint was achieved by utilizing this In coated Cu/Si substrate to facilitate Cu-In diffusion bonding with Cu NW-ACF in this paper.…”

Section: Investigation Of Process Parameters and Characterization Of mentioning

confidence: 99%

Investigation of Process Parameters and Characterization of Nanowire Anisotropic Conductive Film for Interconnection Applications

Tao

Hasan

et al. 2014

IEEE Trans. Compon., Packag. Manufact. Technol.

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In this paper, the assessment of the electrical and mechanical performance of the Cu nanowire anisotropic conductive film (NW-ACF) flip-chip interconnects has been performed. The influence of bonding conditions (bonding temperature and bonding force) has been studied in order to understand their impact on bonding resistance and shear strength for two types of NW-ACF based on different templates with varying porosity and thickness. An overgrowth-stripping method has been employed to obtain uniform NW (200 and 220 nm) arrays in the tracketch polymer membranes. The bonding substrate was coated with indium so that a diffusion soldering between Cu NWs and bulk In film can occur at a relatively low eutectic point (156.6°C). The bonding interface and the fractural surface of NW-ACFs have been characterized by scanning electron microscope and energy dispersive X-ray analysis. Under optimized fabrication conditions, process at the bonding profile of 200°C, 20 N shows that the z-axis resistance can be below 1 m and the shear strength can be above 10 MPa, which is very promising for the fine pitch, 3-D interconnection applications in the future.Index Terms-Electrochemical deposition, fractural surface, nanowire anisotropic conductive film (NW-ACF), shear strength, thermocompression bonding, z-axis resistance.

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Section: Investigation Of Process Parameters and Characterization Of mentioning

confidence: 99%

Investigation of Process Parameters and Characterization of Nanowire Anisotropic Conductive Film for Interconnection Applications

Tao

Hasan

et al. 2014

IEEE Trans. Compon., Packag. Manufact. Technol.

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“…The shadow mask is made of patterned SU8 film on a silicon wafer with several holes, each of which corresponds to each of the bonding pads on the MEMS chip. MEMS chips are then flipped over and bonded onto the glass isolation platform using In-Au Transient Liquid Phase (TLP) bonding at 300 C [4]. The process sequence and results are shown in Fig.…”

Section: Mems Chip Transfer Processmentioning

confidence: 99%

“…The flip-chip bond is strong enough to rip the glass from under the bonding pad. The In-Au bond remains stable up to 495 C [4] This transfer technique has several advantages. First, it is generic.…”

Section: Mems Chip Transfer Processmentioning

confidence: 99%

A Generic Environment-Resistant Packaging Technology for MEMS

Lee

Najafi

2007

TRANSDUCERS 2007 - 2007 International Solid-State Sensors, Actuators and Microsystems Conference

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This paper presents a new generic MEMS packaging technology for thermal and vibration isolation of a MEMS device using an isolation platform crab-leg shaped isolation suspension beams, fabricated from a 100µm-thick glass wafer. The packaging technology is both hermetic and vacuum compatible to pressures <10mTorr, and it provides vertical feedthroughs for signal transfer. A new and generic MEMS die transfer/assembly technique is also developed that can handle a wide variety of individual MEMS chips or wafers, in either a hybrid or integrated fashion. A silicon die with a heater and temperature sensor was fabricated, transferred, and packaged to demonstrate the feasibility of the proposed method. A measured thermal impedance of 3000K/W and feedthrough contact resistance of less than 2Ω has been demonstrated with this package.

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“…To the best of our knowledge, neither logic nor power electronic packages take advantage of rail-shaped solder interconnects. However, rail-like sealing rings are applied by the MEMS industry, to form vacuum cavities for sensor applications [ 16]. Thin solder thicknesses of smaller than 10 µm can typically be applied to the precision components with minimal warpage due to the matched thermal expansion.…”

Section: Introductionmentioning

confidence: 99%