Trench shielded planar gate IGBT (TSPG-IGBT) for low loss and robust short-circuit capalibity

Hu, Jun; Bobde, Madhur; Yılmaz, H.; Bhalla, Aman

doi:10.1109/ispsd.2013.6694390

Cited by 14 publications

(4 citation statements)

References 3 publications

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“…Therefore, further increase of the concentration of CS layer (N cs ) is limited by the breakdown voltage (BV). To alleviate the negative impact of the N cs on BV, various improved methods were proposed for the PIGBT, such as trench shielded structures, and p-buried layer structure, etc [16][17][18]. For the trench shielded PIGBTs, the mesa width between trenches need to be narrowed to provide good shielding effect on the CS layer, leading to a large J sat for these structures.…”

Section: Introductionmentioning

confidence: 99%

Dual injection enhanced planar gate IGBT with self-adaptive hole path for better trade-off and higher SOA capability

Zhang¹,

Huang²,

Liu³

et al. 2022

Semicond. Sci. Technol.

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A novel dual injection enhanced planar gate IGBT with self-adaptive hole path (DIE-PIGBT) is proposed. A floating-P region is applied behind the emitter-connected deep trench in z direction and contacted with the N-type carrier stored (N-CS) layer for the proposed IGBT. Compared to the conventional trench shielded planar gate IGBT (CTS-PIGBT), the proposed device further alleviates the negative impact of the N-CS layer on the breakdown voltage (BV) and reduces both the on-state voltage drop (Vceon) and saturated collector current density (Jsat). Simulation results show that with the same device thickness of 400μm, the BV are 4625V and 4275V for the proposed and conventional device, respectively. The Vceon at 75A/cm2 is 2.51V for the proposed DIE-PIGBT, which is 1.13V lower than that of the CTS-PIGBT. Furthermore, with similar BV to the conventional one, the device thickness can be reduced to 355μm for the DIE-PIGBT. Pro. The total gate charge (QG) and miller plateau charge (QGC) for the proposed device are reduced by 61.0% and 89.9%, respectively. As a result, the proposed structure has better trade-off relationship between the Vceon and turn-off loss (Eoff). At the same Vceon of 2.51V, the Eoff for the DIE-PIGBT and DIE-PIGBT. Pro are 45.17mJ/cm2 and 41.01 mJ/cm2, which is reduced by 44.0% and 49.1% when compared to 80.61mJ/cm2 of the CTS-PIGBT, respectively. Moreover, the Jsat is reduced from 619A/cm2 for the CTS-PIGBT to 368A/cm2 for the DIE-PIGBT under the Vge of 15V. The short-circuit withstand time of the DIE-PIGBT is 1.9 times larger than that of the conventional device.

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Section: Introductionmentioning

confidence: 99%

Dual injection enhanced planar gate IGBT with self-adaptive hole path for better trade-off and higher SOA capability

Zhang¹,

Huang²,

Liu³

et al. 2022

Semicond. Sci. Technol.

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“…Typically, trench based IGBTs include non-active separation regions between active cells for lowering the channel width to achieve good short circuit capability [4] [5]. However, trench IGBTs still require improvements in switching controllability especially for higher voltage devices [6] [7].…”

Section: Introductionmentioning

confidence: 99%

Singular Point Source MOS (S-MOS) Cell Concept

Rahimo¹,

Nistor²

2021

ISPS'21 Proceedings

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A Singular Point Source MOS (S-MOS) cell concept suitable for power semiconductor MOS based devices is presented. The S-MOS differs from a standard Planar or Trench MOS cell in the manner by which the total channel width per device area is determined. The S-MOS cell channel width is defined as the peripheral length of a line running approximately along the N++ source and P channel junction which is situated on a single gated trench side-wall. The length of the line can be established from a singular point source implant for forming the N++ source region which corresponds to the shape of the N++/P junction. The total channel width will therefore depend on the total number of gated trench sidewalls per chip. Despite a relatively short channel width obtained on a single trench side-wall, narrow mesa dimensions between adjacent trenches will provide an adequate number of cells for adjusting the total channel width as required for a given device performance. The S-MOS can be realized by simple manufacturing processes and presents an alternative approach for MOS cell layouts by decoupling critical design parameters (e.g., channel width, trench dimension and NPN transistor area). This flexibility can lead to lower overall losses, lower gate charge levels, improved switching robustness and controllability for different MOS based devices.

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“…In order to improve the trade-off relationship between the Von and the BV, additional charges are introduced to balance the DNI [4][5][6][7]. Nevertheless, the DNI will be fully depleted at high reverse voltage, which means that the DNI still has limited value.…”

Section: Introductionmentioning

confidence: 99%

A Novel Shielded IGBT (SIGBT) With Integrated Diodes

Chen

Lin

et al. 2020

IEEE J. Electron Devices Soc.

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A novel 3.3 kV Shielded Insulated Gate Bipolar Transistor (SIGBT) is proposed in this paper. Unlike the partly shielded N-injector of the diode-clamped TIGBT, which is the carrier store layer, the SIGBT features a diode-clamped Player to completely shield the N-injector and to protect the N-injector from high electric field more steadily. Then, the N-injector can be heavily doped to reduce the on-state voltage (Von), and Von can be designed independently of the breakdown voltage (BV). TCAD simulation indicates that under the same level of BV, compared with the conventional Carrier Store Trench Bipolar Transistor (CSTBT), the Eoff (the turn-off loss) of the proposed SIGBT is 85.6% lower under Von ≈ 1.4 V. Moreover, the saturation current density also decreases by 31.2%. Index Terms-carrier store trench bipolar transistor (CSTBT), on-state voltage, shielded insulated gate bipolar transistor (SIGBT), saturation current.

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Trench shielded planar gate IGBT (TSPG-IGBT) for low loss and robust short-circuit capalibity

Cited by 14 publications

References 3 publications

Dual injection enhanced planar gate IGBT with self-adaptive hole path for better trade-off and higher SOA capability

Dual injection enhanced planar gate IGBT with self-adaptive hole path for better trade-off and higher SOA capability

Singular Point Source MOS (S-MOS) Cell Concept

A Novel Shielded IGBT (SIGBT) With Integrated Diodes

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