‘‘Turn-around’’ effects of stress-induced leakage current of ultrathin N2O-annealed oxides

Lai, Kafai; Chen, Wei Ming; Hao, Ming-Yin; Lee, John; Gardner, Mark; Fulford, J.

doi:10.1063/1.115199

Cited by 15 publications

(5 citation statements)

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“…This is consistent with the existing literature in which the generation rate of the oxide trap is low for ultrathin gate oxides. 18,20 In order to explain the above observation from Figs. 1-5, a model of interface trap generation is proposed.…”

Section: Resultsmentioning

confidence: 95%

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Anomalous low-voltage tunneling current characteristics of ultrathin gate oxide (∼2 nm) after high-field stress

Huang

Hwu

2001

Journal of Applied Physics

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The effect of oxide barrier shape change caused by stress-induced interface trap charges on the low-voltage tunneling current ͑LVTC͒ characteristics of ultrathin gate oxide ͑ϳ2 nm͒ is studied in this work. It was found that for an ultrathin gate oxide working in the direct tunneling regime, the LVTC behavior is strongly dependent on the barrier shape of the oxide. After high-field stress, anomalous LVTC phenomenon is observed. There is an invariant point existing in current-voltage curves. For a bias smaller than the value of the invariant point, the gate current decreases with stress time. However, for a bias larger than that, the gate current increases with stress time and then saturates. This phenomenon cannot be explained by conventional trap-assisted tunneling conduction, but by the change of tunneling probability due to barrier shape variation. An interface trap charge model is proposed to explain the observed invariant point mentioned above. From this, one can find the voltage corresponding to the midgap bias and, therefore, the initial effective oxide charge number density.

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Section: Resultsmentioning

confidence: 95%

“…6,7,[17][18][19] However, the decrease in SILC has been observed as the oxide thickness is less than 5 nm because of the competing effects of the tunneling probability and trap generation rate. 18,20 Thus, the detailed characteristics of the LVTC are still open to discussion for ultrathin gate oxides ͑ϳ2 nm͒.…”

Section: Introductionmentioning

confidence: 99%

Anomalous low-voltage tunneling current characteristics of ultrathin gate oxide (∼2 nm) after high-field stress

Huang

Hwu

2001

Journal of Applied Physics

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“…Therefore, as the constant ®eld stress is applied, direct tunneling is dominant. Moreover, the oxide thickness is less than 3 nm so that SILC is not dominant, since it is smaller than the direct tunneling current [11,12].…”

Section: Resultsmentioning

confidence: 99%

Enhancement in soft breakdown occurrence of ultra-thin gate oxides caused by photon effect in rapid thermal post-oxidation annealing

Huang

Hwu

2000

Solid-State Electronics

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“…The defect concentration resulting from the RTAT model decreases as the oxide thickness is reduced, as already observed. [51,52] In summary, a new model for the SILC conduction mechanism has been proposed. Calculations are in good agreement with a large amount of experimental data, thus supporting the validity of the proposed RTAT model and the assumption of electron-hole recombination at deep levels in the oxide.…”

Section: Silc Modelingmentioning

confidence: 99%

Evidence for recombination at oxide defects and new SILC model

Ielmini

Spinellii²,

Lacaita³

et al.

2000 IEEE International Reliability Physics Symposium Proceedings. 38th Annual (Cat. No.00CH37059)

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This work presents experimental and computational investigations on the physical mechanisms of SILC. Carrier separation measurements are carried out on MOS samples with oxide thickness 6 -8 nm, highlighting the electron and hole contributions to the SILC. We have investigated the relation between these components by means of timerelaxation. It is found that a linear relationship holds between electron SILC and hole SILC, measured at different times after the initial high-field stress. The same linearity has been observed for increasing fluences of injected electrons, at fixed stressing field. A correlation between electron and hole SILC is found also from a comparison between carrier separation data obtained in n f -and p+-polysilicon devices. These experimental data entails that hole SILC is due to a recombination current.As a result of these experimental findings, a new model for the SILC is developed. This model is based on trapassisted tunneling, but also accounts for hole tunneling and includes Shockley-Hall-Read recombination process in the bulk oxide as a new leakage mechanism. Simulations in the oxide thickness range 5.9 -8.2 nm show excellent agreement with I -V measurements and carrierseparation data. The resulting defect concentration scales with the oxide thickness, in agreement with published results. The energy distribution of defects responsible for the steady-state leakage is located 0.7 -1.3 eV below the Si conduction-band minimum. Capture cross sections of cm2 have been assumed for electrons and holes respectively, compatible with a donor charge state of the SILC-related defect centers.Simulations are finally shown for oxide thickness to, = 2.8 nm. The mechanism of recombination in the bulk oxide accounts very well for the observation of low-voltage SILC in ultrathin oxide, showing the effectiveness of the proposed SILC model. and

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‘‘Turn-around’’ effects of stress-induced leakage current of ultrathin N2O-annealed oxides

Cited by 15 publications

References 0 publications

Anomalous low-voltage tunneling current characteristics of ultrathin gate oxide (∼2 nm) after high-field stress

Anomalous low-voltage tunneling current characteristics of ultrathin gate oxide (∼2 nm) after high-field stress

Enhancement in soft breakdown occurrence of ultra-thin gate oxides caused by photon effect in rapid thermal post-oxidation annealing

Evidence for recombination at oxide defects and new SILC model

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