Ultra low-power low-voltage FGMOS based-configurable analog block for current-mode fractional-power functions

Maryan, Mohammad Moradinezhad; Azhari, Seyed Javad

doi:10.1016/j.mejo.2017.05.001

Cited by 8 publications

(1 citation statement)

References 23 publications

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“…There has been recent interest by researchers in the area of FPAA and the design of its core element, which is the CAB. Many publications in the literature used active elements such as operational amplifier (Op-amp), operational transconductance amplifier (OTA), second-generation current conveyors (CCII), or current feedback operational amplifier (CFOA) in the design of CAB [4][5][6][7][8]. At this time, the vast majority of the FPAAs that are available (commercially and academically) are often based on CABs that involve operational amplifiers or other analog primitives with a similar function [9][10][11].…”

Section: Related Workmentioning

confidence: 99%

High-Bandwidth, Low-Power CMOS Transistor Based CAB for Field Programmable Analog Array

Obadi¹,

Hussein²,

Al‐Bawri³

et al. 2023

Computers, Materials &Amp; Continua

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This article presents an integrated current mode configurable analog block (CAB) system for field-programmable analog array (FPAA). The proposed architecture is based on the complementary metal-oxide semiconductor (CMOS) transistor level design where MOSFET transistors operating in the saturation region are adopted. The proposed CAB architecture is designed to implement six of the widely used current mode operations in analog processing systems: addition, subtraction, integration, multiplication, division, and pass operation. The functionality of the proposed CAB is demonstrated through these six operations, where each operation is chosen based on the user's selection in the CAB interface system. The architecture of the CAB system proposes an optimized way of designing and integrating only three functional cells with the interface circuitry to achieve the six operations. Furthermore, optimized programming and digital tuning circuitry are implemented in the architecture to control and interface with the functional cells. Moreover, these designed programming and tuning circuitries play an essential role in optimizing the performance of the proposed design. Simulation of the proposed CMOS Transistor Based CAB system is carried out using Tanner EDA Tools in 0.35 μm standard CMOS technology. The design uses a ±1.5 V power supply and results in maximum 3 dB bandwidth of 34.9 MHz and an 5886 CMC, 2023, vol.74, no.3 approximate size of 0.0537 mm 2 . This demonstrates the advantages of the design over the current state-of-the-art designs presented for comparison in this article. Consequently, the proposed design has a clear aspect of simplicity, low power consumption, and high bandwidth operation, which makes it a suitable candidate for mobile telecommunications applications.

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