Ultra‐low power pass‐transistor‐logic‐based delay line design for sub‐threshold applications

Abstract

Designs that operate at sub-threshold voltages are a promising response to the ultra-low power demands of many modern applications with relaxed performance requirements. Towards this approach, a pass-transistor-logic-based programmable delay line (DL) circuit is presented that is designed specifically for sub-threshold operation. Compared with the commonly used design, the DL consumes 79.2% less dynamic energy, 83.5% less leakage power, 47.2% better linearity across codewords, 58.6% smaller active area, and with similar resiliency to variations across Monte Carlo simulations.

A design method of CPR for wide voltage design

“…In order to accommodate the needs of wide voltage circuits, it is important to design a CPR that accurately mimics critical path delays over a wide voltage range. Similar to literature [20], the delay error (DE) of CPR can be defined as follows,…”