Ultra-low swing CMOS transceiver for 2.5-D integrated systems

Mroszczyk²,

2019 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

2019

Self Cite

The energy for data transfer has an increasing effect on the total system energy as technology scales, often overtaking computation energy. To reduce the power of interchip interconnects, an adaptive encoding scheme called Adaptive Word Reordering (AWR) is proposed that effectively decreases the number of signal transitions, leading to a significant power reduction. AWR outperforms other adaptive encoding schemes in terms of decrease in transitions, yielding up to 73% reduction in switching. Furthermore, complex bit transition computations are represented as delays in the time domain to limit the power overhead due to encoding. The saved power outweighs the overhead beyond a moderate wire length where the I/O voltage is assumed equal to the core voltage. For a typical I/O voltage, the decrease in power is significant reaching 23% at just 1 mm.

Section: B Interconnect Modelmentioning

confidence: 99%

Adaptive Word Reordering for Low-Power Inter-Chip Communication

Mroszczyk²,

2019 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

2019

Self Cite

“…A brief description of the low swing transceiver of [17] is provided in this section. This circuit consists of a dynamic low swing tunable transmitter (DLST-TX) and an inverter-based tunable receiver (INVT-RX).…”

Section: Low Swing Transceivermentioning

confidence: 99%

“…In [17], the additional stages illustrated in Fig. 4 are used for trimming the driving strength of the transceiver in order to compensate process variability.…”

Section: Low Swing Transceivermentioning

confidence: 99%

“…This circuit supports off-chip communication in interposers and offers ultra low level of voltage swing. This transceiver exhibits a 4× decrease in power over full swing communication as shown in [17] for a specific, however, link length. Therefore, this circuit is used as the baseline transceiver to investigate the potential of low swing communication in several physical media developed for 2.5-D integrated systems.…”

Section: Introductionmentioning

confidence: 99%

“…The circuits used to drive the interconnect in the prior art are not well-suited for low swing communication. Consequently, to investigate the effectiveness of the low swing paradigm in different interposer technologies, an appropriate single-ended transceiver proposed in [17] is employed. This circuit supports off-chip communication in interposers and offers ultra low level of voltage swing.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Energy Efficiency of Low Swing Signaling for Emerging Interposer Technologies

Mroszczyk

Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures

2018

Self Cite

Interconnects often constitute the major bottleneck in the design process of low power integrated circuits (IC). Although 2.5-D integration technologies support physical proximity, the dissipated power in the communication links remains high. In this work, the additional power savings for interposer-based interconnects enabled by low swing signaling is investigated. The energy consumed by a low swing scheme is, therefore, compared with a full swing solution and the critical length of the interconnect, above which the low swing solution starts to pay off, is determined for diverse interposer technologies. The energy consumption is compared for three different substrate materials, silicon, glass, and organic. Results indicate that the higher the load capacitance of the communication medium is, the greater the energy savings of the low swing circuit are. Specifically, in cases that electrostatic discharge (ESD) protection is required, the low swing circuit is always superior in terms of energy consumption due to the high capacitive load of the ESD circuit, regardless the substrate material and the link length. Without ESD protection, the highest critical length is about 380 µm for glass and organic interposers. To further explore the limits of power reduction from low swing signaling for 2.5-D ICs, the effect of typical interconnect parameters such as width and space on the energy efficiency of low swing communication is evaluated.

Energy-Efficient Time-Based Adaptive Encoding for Off-Chip Communication

2020

IEEE Trans. VLSI Syst.

Self Cite

The energy for data transfer has an increasing effect on the total system energy as technology scales, often overtaking computation energy. To reduce the power of interchip interconnects, an adaptive encoding scheme called Adaptive Word Reordering (AWR) is proposed that effectively decreases the number of signal transitions, leading to a significant power reduction. A novel circuit is implemented which exploits the time domain to represent complex bit transition computations as delays and, thus, limits the power overhead due to encoding. The effectiveness of AWR is validated in terms of decrease in both bit transitions and power consumption. AWR is shown to yield higher power savings compared to three state-of-theart techniques reaching 23% and 61% during the transfer of multiplexed address-data and image files, respectively, at just 1 mm wire length.