Ultra-Low Voltage VLSI: Are We There Yet?

Abstract

Aggressively scaled supply voltage has been touted subthreshold) voltages to minimize energy consumption [5]. as one of the most powerful mechanisms for improving In these applications, energy efficiency typically overrides reliability and reducing power consumption in nanometer speed performance; therefore, the increased latencies technologies. Sophisticated adaptive power management generally associated with ultra-low voltage circuits do not techniques vary supply voltage from nominal to ultra-low pose a serious limitation. In applications requiring higher values to implement adaptive VLSI systems that gracefully performance, however, additional techniques must be used to respond to varying workload demands for improved energy restore the speed loss that accompanies voltage reduction. efficiency. Unfortunately, ultra-low voltage (sub-volt for These techniques are reviewed in Section II. Trends and current technologies) operation has been constrained by performance limitations. In this paper, the current state of pr oSectsor ultra-o voltage IV lus syte ar exmamy. low-voltage VLSI design is evaluated; techniques for n Secon III and Secon IV concludes wth a summar.maintaining acceptable throughputs at ultra-low voltages are reviewed; and trends and prospects for ultra-low voltage VLSI