1989
DOI: 10.1109/58.31793
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Ultrasonic phased-array scanner with digital echo synthesis for Doppler echocardiography

Abstract: For the purpose of the quantitative assessment of subtle disease processes in the cardiovascular system an electronically steered sector scanner that combines echographic imaging and Doppler blood velocity measurements has been developed. The integrated operation of a fast Fourier transform (FFT) Doppler signal processor for the simultaneous blood velocity evaluation of 64 individual gates is among the specific design goals. The instrument incorporates an unusually high degree of digital signal processing, whi… Show more

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Cited by 7 publications
(6 citation statements)
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“…However, since the FIFO and adder sizes increase dramatically with the number array of elements, the scheme is not very feasible for implementation at the board level or in VLSI. Alternatively, the samples can be added recursively using partial sum registers [6]. But this technique is not particularly practical, because of the adder speed requirement.…”
Section: Digital Beamformingmentioning
confidence: 99%
See 2 more Smart Citations
“…However, since the FIFO and adder sizes increase dramatically with the number array of elements, the scheme is not very feasible for implementation at the board level or in VLSI. Alternatively, the samples can be added recursively using partial sum registers [6]. But this technique is not particularly practical, because of the adder speed requirement.…”
Section: Digital Beamformingmentioning
confidence: 99%
“…Thus, it results in an annoying artifact called Moire pattern which is a well-defined pattern of holes in the image corresponding to the unaddressed pixels. Artifacts can be decreased by using two dimensional interpolation techniques [ 131, [6]. This significantly increases the computational cost of the scan conversion process.…”
Section: Digital Beamformingmentioning
confidence: 99%
See 1 more Smart Citation
“…and adder sizes dramatically increase with the number array of elements, the scheme is not very feasible for implementation at the board level or in VLSI. Alternatively, the samples can be added recursively using partial sum registers [7]. But this technique is not particularly easy due to the requirement of very fast additions.…”
Section: V-657mentioning
confidence: 99%
“…Due to recent developments in integrated circuit technology, real-time digital receive beamforming techniques become attractive ( Fig. 1) [5,6,7,8,9].…”
Section: Introductionmentioning
confidence: 99%