Using Floating Gate and Quasi-Floating Gate Techniques for Rail-to-Rail Tunable CMOS Transconductor Design

Miguel, José; Lopez-Martin, A.J.; Acosta, Lucía; Ramírez-Angulo, J.; Carvajal, R.G.

doi:10.1109/tcsi.2011.2157782

Cited by 61 publications

(34 citation statements)

References 28 publications

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“…Several FG based applications can be found out of which few are related to design of multiplier, transconductor, filter, I-V converter, CM with wide dynamic range and enhanced bandwidth and many other concerned to low voltage applications such as CM with enhanced bandwidth [7], CM with enhanced characteristics [8]. Taking advantage of capacitor divider property, some QFG based transistors were used for design of very linear programmable CMOS OTA [9] which further used to implement tunable MOS resistors [10] and also GM-C filter [11]. Other recent published articles are based on current conveyor [12], CM having low input compliance voltage [13].…”

Section: Gdmentioning

confidence: 99%

Low Power Circuit Design Techniques: A Survey

Raj¹,

Singh²,

Gupta³

2015

IJCTE

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Abstract-This paper presents a detail on various techniques to realize low voltage low power circuit. The techniques discussed are conventional gate-driven (GD), floating gate (FG), quasi-floating gate (QFG), bulk-driven (BD), and BD-QFG. The comparative analysis results in best performance achieved by BD-QFG approach. As BD circuits are well known approach for low power design, the combined effect QFG in bulk driven circuit results in enhanced performance. The complete analysis has been carried out in industry specific node UMC 0.18 micron technology with the help of HSpice simulator.

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Section: Gdmentioning

confidence: 99%

Low Power Circuit Design Techniques: A Survey

Raj¹,

Singh²,

Gupta³

2015

IJCTE

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“…However, to avoid the design issue stemming from the large resistor size, a MOST in the cut-off region (diode connected transistor) is used instead of this resistor, as shown in Fig. 1 (b) [33][34][35]. This very large voltage dependent resistor (diode connected transistor) can take values in the range of hundreds of Giga Ohms.…”

Section: Introductionmentioning

confidence: 99%

Quadrature oscillator based on novel low-voltage ultra-low-power quasi-floating-gate DVCC

et al. 2017

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In this work, a new realization topology of the low-voltage ultra-low-power quadrature oscillator is presented. This quadrature oscillator utilizes only two active elements, namely differential voltage current conveyor (DVCC), and five passive ones, all of them are grounded, which is recommended for the integrated circuit implementation. The DVCC is based on quasi-floating-gate MOS transistor, which is a distinct technique from the conventional one, featuring with operation at low-voltage and ultra-low-power conditions; hence the proposed DVCC works with low supply voltage of ± 400 mV and consumes power of merely 6.6 µW. Thanks to these features the total power dissipation of the oscillator is only 0.28 mW. The simulation results using 0.18 µm TSMC CMOS technology are included in order to prove the design correctness.

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“…Adaptive biasing, resistive source degeneration with passive resistors or active counterparts, cross-coupled differential pairs, triodemode input transistors, the techniques based on floating gate and quasi-floating gate transistors and various methods of derivative superposition are frequently used to linearize OTAs [17][18][19][20][21][22][23][24][25]. In some cases, two or more techniques are combined to obtain higher linearity [10,12,13,[26][27][28][29].…”

Section: Introductionmentioning

confidence: 99%