V‐band low phase‐noise oscillator based on a cavity resonator integrated in the silicon substrate of the MCM‐D platform

Abstract

In this article, we present a V‐band low‐phase‐noise oscillator stabilized by a silicon integrated cavity resonator (SiCR). The SiCR is realized in a multi chip module‐deposited thin‐film technology platform. The high resistivity silicon substrate is thinned to 100 μm and through silicon vias are available. The resonator is formed by a double row of through silicon vias defining a TM010 cylindrical cavity resonator. The area on top of the resonator is reused for flip‐chip mounting the active device, a MMIC chip realized in BiCMOS technology, implementing SiGe heterojunction bipolar transistors. A lower phase noise is demonstrated for the oscillator using SiCR in comparison with an idle oscillator using the same active device but a shorted CPW line as resonator. In the best case, the phase‐noise of the oscillator with SiCR is reduced to −102 dBc/Hz at 1‐MHz carrier offset, fosc = 54 GHz, from −89 dBc/Hz at 1 MHz carrier offset, fosc = 47.3 GHz, corresponding to the idle oscillator, using the CPW resonator. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 54:1788–1792, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26946

Design of on‐chip resonator using distributed capacitors in 0.13‐μm (Bi)‐CMOS technology

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Low Phase Noise Oscillator at 60 GHz Stabilized by a Substrate Integrated Cavity Resonator in LTCC

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