2016
DOI: 10.1038/srep29354
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Valley-engineered ultra-thin silicon for high-performance junctionless transistors

Abstract: Extremely thin silicon show good mechanical flexibility because of their 2-D like structure and enhanced performance by the quantum confinement effect. In this paper, we demonstrate a junctionless FET which reveals a room temperature quantum confinement effect (RTQCE) achieved by a valley-engineering of the silicon. The strain-induced band splitting and a quantum confinement effect induced from ultra-thin-body silicon are the two main mechanisms for valley engineering. These were obtained from the extremely we… Show more

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Cited by 3 publications
(1 citation statement)
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“…Accordingly, it is still a challenge to achieve ultra-narrow constrictions on vertically aligned Si micro/nanostructures following the traditional top-down procedures. Thermal oxidation is an effective method for 'fabricating' Si nanostructures such as particles [18,19], wires [20,21] and membranes [22,23]. It has been clearly demonstrated that the stress induced by the mismatch of volume between the Si atom (Ω Si : 20 Å 3 ) and the SiO 2 molecule (Ω SiO2 : 45 Å 3 ) shows an obvious impact on the oxidation rate [24][25][26].…”
Section: Introductionmentioning
confidence: 99%
“…Accordingly, it is still a challenge to achieve ultra-narrow constrictions on vertically aligned Si micro/nanostructures following the traditional top-down procedures. Thermal oxidation is an effective method for 'fabricating' Si nanostructures such as particles [18,19], wires [20,21] and membranes [22,23]. It has been clearly demonstrated that the stress induced by the mismatch of volume between the Si atom (Ω Si : 20 Å 3 ) and the SiO 2 molecule (Ω SiO2 : 45 Å 3 ) shows an obvious impact on the oxidation rate [24][25][26].…”
Section: Introductionmentioning
confidence: 99%