VCore-based design methodology

Muraoka, Michiaki; Hamada, Hideyuki; Nishi, Hiroaki; Tada, Takashi; Onishi, Yoichi; Hosokawa, Toshinori; Yoshida, Kenji

doi:10.1145/1119772.1119861

“…To design the RTL description for bus interface circuits of hardware VCore, we used the interface synthesis methodology introduced i n reference [10]. For the generation of software from software VCores we used the software synthesis methodology introduced in reference [10].…”

Section: Architecture Design Experimentsmentioning

confidence: 99%

Synthesis for SoC architecture using VCores

Nishi¹,

Muraoka²,

Morizawa³

et al. 2003

Proceedings of the 2003 Conference on Asia South Pacific Design Automation - ASPDAC

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In this paper, we propose a novel architecture synthesis method for SoC using VCores. VCores are reusable and configurable high-level descriptions. An initial SoC architecture, which consists of a CPU, buses, and peripherals, is generated based on an architecture template. The hardware and software tradeoff is possible on the architecture model after assignment of software VCores or hardware VCores. The assignment is based on the results of the architecture's performance estimation. We present a prototype of the synthesis for SoC architecture using VCores and an architecture level design experiment using this prototype.

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“…Moreover, this causes another problem that IPs which are different as chalk and cheese are generated one after another, and this makes it difficult to handle them. In these circumstances, we have proposed VCores as system-level design property and VCDS (Virtual Core Design System) as a top-down design system for SoCs [1,2].…”

Section: Introductionmentioning

confidence: 99%

VCore-based platform for SoC design

Onishi¹,

Muraoka²,

Utsuki³

et al. 2003

Proceedings of the 2003 Conference on Asia South Pacific Design Automation - ASPDAC

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The reuse-based design paradigm is the key to improve the design productivity of SoCs (System on a Chip). However, SoC designers have difficulty in using conventional IPs (Intellectual Property) because they don't have enough variability, it is difficult to customize them. In this paper, we propose the variability of VCores (Virtual Cores) and show VCores are superior to IPs for system-level design property. Based on VCores, we have developed a VCore-based platform. We show the SoC design productivity will be improved by using VCores and the VCore-based platform.

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“…The interface part of a VCores is synthesized by the hardware-hardware interface synthesis [10]. Behavioral synthesis tools are used to synthesize the computation part.…”

Section: Hardware Vcorementioning

confidence: 99%

“…To design the RTL description for bus interface circuits of hardware VCore, we used the interface synthesis methodology introduced i n reference [10]. For the generation of software from software VCores we used the software synthesis methodology introduced in reference [10].…”

Section: Architecture Design Experimentsmentioning

confidence: 99%

See 1 more Smart Citation

Synthesis for SoC architecture using VCores

Nishi¹,

Muraoka²,

Morizawa³

et al.

Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003.

View full text Add to dashboard Cite

In this paper, we propose a novel architecture synthesis method for SoC using VCores. VCores are reusable and configurable high-level descriptions. An initial SoC architecture, which consists of a CPU, buses, and peripherals, is generated based on an architecture template. The hardware and software tradeoff is possible on the architecture model after assignment of software VCores or hardware VCores. The assignment is based on the results of the architecture's performance estimation. We present a prototype of the synthesis for SoC architecture using VCores and an architecture level design experiment using this prototype.

show abstract

VCore-based design methodology

Cited by 9 publications

References 8 publications

Synthesis for SoC architecture using VCores

Synthesis for SoC architecture using VCores

VCore-based platform for SoC design

Synthesis for SoC architecture using VCores

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