Lecture Notes in Computer Science
DOI: 10.1007/978-3-540-77966-7_8
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Verifying Parametrised Hardware Designs Via Counter Automata

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Cited by 12 publications
(12 citation statements)
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“…Using the same technique, we also verified the COUNTER and SYNLIFO programs, obtained by translating VHDL designs of hardware counter and synchronous LIFO [21]. These models have infinite runs for any input values, which is to be expected, as they encode the behavior of synchronous reactive circuits.…”
Section: Experimental Evaluationmentioning
confidence: 91%
See 1 more Smart Citation
“…Using the same technique, we also verified the COUNTER and SYNLIFO programs, obtained by translating VHDL designs of hardware counter and synchronous LIFO [21]. These models have infinite runs for any input values, which is to be expected, as they encode the behavior of synchronous reactive circuits.…”
Section: Experimental Evaluationmentioning
confidence: 91%
“…We have validated the methods described in this paper by automatically verifying termination of all the octagonal running examples, and of several integer programs synthesized from (i) programs with lists [3] and (ii) VHDL models [21]. We have first computed automatically their strongest summary relation T , by adapting the method for reachability analysis for integer programs, described in [6], and implemented in the FLATA tool [13].…”
Section: Experimental Evaluationmentioning
confidence: 99%
“…The benchmarks are all in the Numerical Transition Systems format 10 (NTS). We have considered seven sets of examples, extracted automatically from different sources: (a) C programs with arrays provided as examples of divergence in predicate abstraction [21], (b) verification conditions for programs with arrays, expressed in the SIL logic of [9] and translated to NTS, (c) small C programs with challenging loops, (d) NTS extracted from programs with singly-linked lists by the L2CA tool [8], (e) C programs provided as benchmarks in the NECLA static analysis suite, (f) C programs with asynchronous procedure calls translated into NTS using the approach of [15] (the examples with extension .optim are obtained via an optimized translation method [Pierre Ganty, personal communication], and (g) models extracted from VHDL models of circuits following the method of [27]. The benchmarks are available from the home page of our tool.…”
Section: Resultsmentioning
confidence: 99%
“…We next give an experimentally compare FLATA and ELDARICA on six sets of examples extracted automatically from different sources: (a) C programs with arrays provided as examples of divergence in predicate abstraction [9], (b) INTS extracted from programs with singly-linked lists by the L2CA tool [1], (c) INTS extracted from VHDL models of circuits following the method of [10], (d) verification conditions for programs with arrays, expressed in the SIL logic of [2] and translated to INTS, (e) C programs provided as benchmarks in the NECLA static analysis suite, and (f) C programs with asynchronous procedure calls translated into INTS using the approach of [5] (the examples with extension .optim are obtained via an optimized translation method). Experiments were ran on an Intel R Core TM 2 Duo @ 2.66GHz with 3GB RAM.…”
Section: Experimental Comparison Of the Flata And Eldarica Toolsmentioning
confidence: 99%
“…var i,j : Int l0 : havoc(i ); assume(i >= 0) l1 : havoc(j ); assume(j >= 0) l2 : var x: Int = i ; var y: Int = j l3 : while (x != 0) { l4 : x = x − 1; l5 : [10], programs with singly-linked lists [1], trees [6], and integer arrays [2]. Consider the program in Figure 1(a).…”
Section: Introductionmentioning
confidence: 99%