VLSI Implementation of Neural Classifiers

Rao, Ashwin; Walker, M.; Clark, Lawrence T.; Akers, L.A.; Grondin, R.

doi:10.1162/neco.1990.2.1.35

Cited by 15 publications

(2 citation statements)

References 6 publications

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“…The paper concluded with a performance analysis, which indicated that the device shows promise of significantly outperforming electronics, potentially computing 10'' to 1 0 '~ operations, as opposed to lo7 operations in the fastest electronic alternative. (1989)(1990)(1991) and a member of the Editorial Board of The International Journal ofNeurocomputing (1989)(1990)(1991)(1992) Washington, in 1973, 1974, and 1979, respectively, all in physics. From 1979to 1982 he was a postdoctoral research associate at the Joint Institute for Laboratory Astrophysics where he measured fusion-related electronion collision cross sections in conjunction with the Oak Ridge National Laboratory, TN.…”

Section: Discussionmentioning

confidence: 99%

An optoelectronic implementation of the adaptive resonance neural network

Wunsch

Caudell

Capps

et al. 1993

IEEE Trans. Neural Netw.

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Abstruct-Implementation of the adaptive resonance theory (ART) of neural networks has been a thorny problem for several years. This work presents a novel solution to the problem by using an optical correlator, allowing the large body of correlator research to be leveraged in the implementation of ART. The implementation takes advantage of the fact that one ART-based architecture, known as ART1, can be broken into several parts, some of which are better to implement in parallel. The control structure of ART, often regarded as its most complex part, is actually not very time consuming and can be done in electronics. The bottom-up and top-down gated pathways, however, are very time consuming to simulate and are difficult to implement directly in electronics due to the high number of interconnections. Tbo face simplify this. The first is that the pathways are computing a set of inner products. These inner products represent as least 80% of the computation time of the ARTl implementation. The second insight, our contribution, is that implementing the inner products optically, and the rest of the network in electronics, is a very effective marriage of the two technologies to realize the ARTl network. In addition to the design, we present experiments with a laboratory prototype to illustrate its feasibility and to discuss implementation details that arise in practice. This device potentially can significantly outperform alternative implementations of ARTl by as much as two to three orders of magnitude in problems requiring especially large input fields. It should be noted that all of these results apply to just one of the various ART architectures, known as ART1, but that other ART networks and other neural nets in general also use inner products and could benefit from this work as well.

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Section: Discussionmentioning

confidence: 99%

An optoelectronic implementation of the adaptive resonance neural network

Wunsch

Caudell

Capps

et al. 1993

IEEE Trans. Neural Netw.

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“…Silicon large scale neuro chips have been designed and demonstrated [51,52,53,54,55,56]. However these are limited in Interconnect density.…”

Section: Introductionmentioning

confidence: 99%

<title>Character recognition using novel optoelectronic neural network</title>

1993

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BROOKS AIR FORCE BASE, TEXAS NOTICESThis technical paper is published as received and has not been edited by the technical editing staff of the Armstrong Laboratory.The interpretations, conclusions, recommendations, and opinions are those of the author and are not necessarily endorsed by the U.S. Air Force or the Department of Defense.When Government drawings, specifications, or other data are used for any purpose other than in connection with a definitely Government-related procurement, the United States Government incurs no responsibility or any obligation whatsoever. The fact that the Government may have formulated or in any way supplied the said drawings, specifications, or other data, is not to be regarded by Implication, or otherwise in any manner construed, as licensing the holder, or any other person or corporation; or as conveying any rights or permission to manufacture, use, or sell any patented invention that may in any way be related thereto.The Office of Public Affairs has reviewed this paper, and it is releasable to the National Technical Information Service, where it will be available to the general public, including foreign nationals. This paper has been reviewed and is approved for publication. Approved for public release; distribution is unlimited. ABSTRACT (Aaxnmum 200 words)A novel optoelectronic neural network has been designed and constructed to recognize a set of characters from the alphabet. The network consists of a 15Xl binary input vector, two optoelectronic vector matrix multiplication layers, and a 15X1 binary output layer. The network utilizes a pair of custom fabricated Spatial Light Modulators (SLMs) with 120 levels of gray scale per pixel. The SIMs realize the matrix weights. Previous networks of this type were hampered by limited levels of gray scale and the need to use two separate weight masks (matrices) per layer. The weight masks are operated in unipolar mode. This allows both positive and negative weights to be realized from the same mask. A hard limiting function is used for the network's nonlinearity. A modification of Widrow's lesser known MR2 training algorithm is used to train the network. Furthermore, the network introduces a novel lens-free crossbar matrix-vector multiplier. multiplier.

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Introduction

Annema

1995

Feed-Forward Neural Networks

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VLSI Implementation of Neural Classifiers

Cited by 15 publications

References 6 publications

An optoelectronic implementation of the adaptive resonance neural network

An optoelectronic implementation of the adaptive resonance neural network

<title>Character recognition using novel optoelectronic neural network</title>

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