Void formation and its impact on Cu Sn intermetallic compound formation

Ross, Glenn; Vuorinen, Vesa; Paulasto‐Kröckel, Mervi

doi:10.1016/j.jallcom.2016.03.193

Cited by 51 publications

(29 citation statements)

References 26 publications

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“…5d)) in the Zn-5Al/Cu solder interconnects after 30 min of reaction. This phenomenon has not previously been reported in Zn-based solder joints, but it is similar to the observations of voids in Cu 3 Sn layers in aged Sn/Cu solder joints [12,25,26]. The formation of these nano-sized voids can be attributed to the difference between the intrinsic diffusivities of Cu and Zn.…”

Section: Evolution Of Imc Morphologies During Liquid-solid Reactionsupporting

confidence: 89%

“…Consequently, the formation of Kirkendall voids near the CuZn layer is clearly unavoidable. This situation has seldom been previously reported in Zn-Al solder joints, but enormous efforts have been made with regard to conventional Sn-based solder joints, with similar findings concerning void formation in Cu 3 Sn layers [12,25,26]. Based on these works, it can be predicted that these Kirkendall voids in Zn-Al solder joints could cause the mechanical reliability of Zn-Al solder joints to deteriorate.…”

Section: Diffusional Formation Mechanism Of Imcs In Zn-al Solder Intementioning

confidence: 65%

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Diffusion barrier property of electroless Ni-W-P coating in high temperature Zn-5Al/Cu solder interconnects

Liu

Chen

Zhou

et al. 2017

Journal of Alloys and Compounds

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The operating temperature of high-temperature electronics can significantly promote the growth of intermetallic compounds (IMCs) at solder/substrate interfaces, particularly for low-cost Zn-based solders because of the rapid rate of reaction of Zn with Cu. Thus, a reliable and robust diffusion barrier is indispensable for suppressing the reactions between solder and substrate. In this work, a ternary Ni-W-P alloy was prepared via electroless plating. Its diffusion barrier property was evaluated by comparing the microstructures of IMC layers in Zn-5Al/Ni-W-P/Cu and Zn-5Al/Cu interconnects after liquid-solid reaction for prolonged durations. When the reaction lasted for 30 min, the thickness of the Al 3 Ni 2 produced in the Zn-5Al/Ni-W-P/Cu solder interconnects was only 2.15 μm, whereas the thickness of the interfacial layer of Cu-Zn IMCs (CuZn 4 , Cu 5 Zn 8 and CuZn) at the Zn-5Al/Cu interface was 94 μm. Because of the unbalanced growth of the IMCs in the Zn-5Al/ Cu interconnects, notable numbers of Kirkendall voids were identified at the CuZn 4 /Cu 5 Zn 8 , Cu 5 Zn 8 /CuZn and CuZn/Cu interfaces after prolonged liquid-solid reaction. By contrast, the Al 3 Ni 2 layer in the Zn-5Al/ Ni-W-P/Cu solder joints remained intact, showing the potential to effectively enhance the mechanical reliability of electronic devices.

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Section: Evolution Of Imc Morphologies During Liquid-solid Reactionsupporting

confidence: 89%

Section: Diffusional Formation Mechanism Of Imcs In Zn-al Solder Intementioning

confidence: 65%

Diffusion barrier property of electroless Ni-W-P coating in high temperature Zn-5Al/Cu solder interconnects

Liu

Chen

Zhou

et al. 2017

Journal of Alloys and Compounds

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“…Vuorinen et al [50] have investigated Au-Sn and Cu-Sn SLID, with a special focus on the mechanisms of the dynamic evolution during bonding and the corresponding void formation [51,52].…”

Section: Related Workmentioning

confidence: 99%

Intermetallic Bonding for High-Temperature Microelectronics and Microsystems: Solid-Liquid Interdiffusion Bonding

Aasmundtveit¹,

Luu²,

Nguyen³

et al. 2018

Intermetallic Compounds - Formation and Applications

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Solid-liquid interdiffusion (SLID) bonding for microelectronics and microsystems is a bonding technique relying on intermetallics. The high-melting temperature of intermetallics allows for system operation at far higher temperatures than what solder-bonded systems can do, while still using similar process temperatures as in common solder processes. Additional benefits of SLID bonding are possibilities of fine-pitch bonding, as well as thin-layer metallurgical bonding. Our group has worked on a number of SLID metal systems. We have optimized wafer-level Cu-Sn SLID bonding to become an industrially feasible process, and we have verified the reliability of Au-Sn SLID bonding in a thermally mismatched system, as well as determined the actual phases present in an Au-Sn SLID bond. We have demonstrated SLID bonding for very high temperatures (Ni-Sn, having intermetallics with melting points up to 1280°C), as well as SLID with low process temperatures (Au-In, processed at 180°C, and Au-In-Bi, processed at 90-115°C). We have verified experimentally the high-temperature stability for our systems, with quantified strength at temperatures up to 300°C for three of the systems: Cu-Sn, Au-Sn and Au-In.Keywords: microelectronics/microsystem assembly, bonding technology, harsh environments, wafer processing, reliability, transient liquid phase © 2018 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. Motivation for SLID The challenge of die attach and interconnectionFor all electronic systems, the attachment of components to substrates and their electrical connection is a crucial part of the system. Traditionally, the processes for attachment and interconnection have been considered more a craft than a science. The historical focus of electronics and microtechnology has been on the design, manufacturing and testing of components, circuits and devices, rather than on the system integration and the processes needed for actually building the system. The 'electronic revolution' has given ever-increasing performance of devices at ever-decreasing prices for more than half a century. Initial milestones were the invention of the transistor (1947) and the integrated circuit (IC) (1958). The driving factor has been a continuous decrease in size (of components and on features of components) and cost, made possible through batch processing of silicon wafers. Single-crystal silicon is a very well-defined material with extremely well-characterized properties, allowing process technology that yields extremely small features (10 nm by 2017, with a further decrease expected). Miniaturization of components and the use of large Si wafers give a huge number of components manufactured in every batch, lowering the cost. Furthermore, miniaturization allows an increase in operating frequency (or a decrease...

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“…Moreover, they seem largely unpredictable and may cause crack propagation and thus reduce interconnection life severely by mere accident [2]. These voids, appearing within the interfacial intermetallic compound (IMC) layers at interconnections, are commonly referred as Kirkendall voids, which can be thought of as a consequence of the difference in diffusion rates of the metal atoms [3,4]. Nevertheless, a same sort of interconnections often exhibit inherently contradictory tendencies for the void amounts, even though the interconnections were identical in structure and composition, which indicates that this void formation is deeply influenced by other factors.…”

Section: Introductionmentioning

confidence: 99%

Robust tuning of Kirkendall void density in circuit interconnections through substrate strain annealing

Cai

Wang

et al. 2018

J Mater Sci: Mater Electron

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Unpredictable Kirkendall void formation at the interface of circuit interconnections underlies degradation in electronics, yet there is a lack of effective approaches to curb the amount of these voids. Here we developed a strain-anneal method to tailor grain size distributions in the copper substrate of interconnections, and demonstrate quantitatively that not only the removal of the impurities but also an increase in the grain size of the substrates leads to an appreciable decline in the void density. The interconnections on the substrate recrystallized at a high annealing temperature show the massive porosity and the increased sensitivity of the voiding to the grain size. Our findings have broad implications for manipulation of void propensity in many other hetero-interfaces and are essential for high-performance circuit bonding in high temperature/high power electronic devices based on wide band gap semiconductors.

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Void formation and its impact on Cu Sn intermetallic compound formation

Cited by 51 publications

References 26 publications

Diffusion barrier property of electroless Ni-W-P coating in high temperature Zn-5Al/Cu solder interconnects

Diffusion barrier property of electroless Ni-W-P coating in high temperature Zn-5Al/Cu solder interconnects

Intermetallic Bonding for High-Temperature Microelectronics and Microsystems: Solid-Liquid Interdiffusion Bonding

Robust tuning of Kirkendall void density in circuit interconnections through substrate strain annealing

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