Voltage Glitch Attacks on Mixed-Signal Systems

Beringuier-Boher, Noemie; Gomina, Kamil; Hély, David; Rigaud, Jean-Baptiste; Beroulle, Vincent; Tria, Assia; Damiens, Joël; Gendrier, Philippe; Candelier, P.

doi:10.1109/dsd.2014.14

Cited by 21 publications

(15 citation statements)

References 19 publications

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“…One of the well-known types of active attacks widely studied during the last two decades is fault injection attack (FIA). FIAs are usually accomplished by manipulating either environmental parameters or inputs [27][28][29]. FIA has been demonstrated to be a powerful technique to reveal secret data with a small number of experiments [12,30].…”

Section: Introductionmentioning

confidence: 99%

“…Fault injection attacks can be further classified into three different categories, namely, invasive, non-invasive, and semi-invasive [28]. Invasive attacks are the type of intrusions performed by de-packaging the integrated circuit (IC) and modifying the physical properties to do some probing.…”

Section: Introductionmentioning

confidence: 99%

“…Randomness in faulty signal: Many of the faulty signal-generating methods presented, such as [7,9,10,18,19,27,28,37], are deterministic methods. To set up a fault generator and to apply an attack with high accuracy, all the output parameters must be prepared and calculated.…”

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confidence: 99%

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A Review on Evaluation and Configuration of Fault Injection Attack Instruments to Design Attack Resistant MCU-Based IoT Applications

et al. 2020

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The Internet-of-Things (IoT) has gained significant importance in all aspects of daily life, and there are many areas of application for it. Despite the rate of expansion and the development of infrastructure, such systems also bring new concerns and challenges. Security and privacy are at the top of the list and must be carefully considered by designers and manufacturers. Not only do the devices need to be protected against software and network-based attacks, but proper attention must also be paid to recently emerging hardware-based attacks. However, low-cost unit software developers are not always sufficiently aware of existing vulnerabilities due to these kinds of attacks. To tackle the issue, various platforms are proposed to enable rapid and easy evaluation against physical attacks. Fault attacks are the noticeable type of physical attacks, in which the normal and secure behavior of the targeted devices is liable to be jeopardized. Indeed, such attacks can cause serious malfunctions in the underlying applications. Various studies have been conducted in other research works related to the different aspects of fault injection. Two of the primary means of fault attacks are clock and voltage fault injection. These attacks can be performed with a moderate level of knowledge, utilizing low-cost facilities to target IoT systems. In this paper, we explore the main parameters of the clock and voltage fault generators. This can help hardware security specialists to develop an open-source platform and to evaluate their design against such attacks. The principal concepts of both methods are studied for this purpose. Thereafter, we conclude our paper with the need for such an evaluation platform in the design and production cycle of embedded systems and IoT devices.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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A Review on Evaluation and Configuration of Fault Injection Attack Instruments to Design Attack Resistant MCU-Based IoT Applications

et al. 2020

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“…According to the SoC design technique, the analog and digital intellectual property (IP) cores are delivered by third parties and the IC designer only works on the interconnection structure between the provided modules and constructing the top module. In other words, the main circuit is built by the analog and digital sub-circuits given by external sources [1][2][3].…”

Section: Introductionmentioning

confidence: 99%

Security Interrogation and Defense for SAR Analog to Digital Converter

2017

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Nowadays, the analog and mixed-signal intellectual property (IP) cores play an important role in system on chip (SoC) design due to their capabilities in performing critical functions. These IPs can be the target of adversaries similar to their digital counterparts. In this work, we study the security aspects of a tunnel field effect transistor (TFET)-based six-bit successive approximation register (SAR) analog to digital converter (ADC) through proposing two threats and two countermeasures that target the output signals of the ADC datapath and its control unit. The datapath-based threat manipulates the exiting signals from the register file, and its countermeasure attempts to filter the ADC output based on the convention of having ±1 least significant bit variation (at maximum) between the adjacent sampled data points. The control-based threat manipulates the exiting signals from the control unit, and its countermeasure is a trustworthy replication of a part of the ADC circuit that is used to provide reference data for security examination and output filtering.

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“…We define the BIST module as the central intelligence unit (CIU) in the hardware security terminology. Many research works were done for security checking and protection provision in the digital domain [11,12], while only a few studies are seen in the analog/mixed-signal domain [15][16][17][18][19][20][21]. Due to this lack of knowledge, more research needs to be done in the area of analog/mixed-signal hardware security in order to find and develop related threats and countermeasures.…”

Section: Introductionmentioning

confidence: 99%

Mixed-Signal Hardware Security: Attacks and Countermeasures for ΔΣ ADC

Taheri

Yuan

2017

Electronics

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Mixed-signal integrated circuits (ICs) play an eminent and critical role in design and development of the embedded systems leveraged within smart weapons and military systems. These ICs can be a golden target for adversaries to compromise in order to function maliciously. In this work, we study the security aspects of a tunnel field effect transistor (TFET)-based first-order one-bit delta-sigma (∆Σ) analog to digital converter (ADC) through proposing four attack and one defense models. The first attack manipulates the input signal to the ∆Σ modulator. The second attack manipulates the analog version of the modulator output bit and is triggered by the noise signal. The third attack manipulates the modulator output bit and has a controllable trigger mechanism. The fourth attack manipulates the analog version of the modulator output bit and is triggered by a victim capacitance within the chip. For the defense, a number of signal processing filters are used in order to purge the analog version of the modulator output bit for elimination of the malicious unwanted features, introduced by the attacks. According to the simulation results, the second threat model displays the strongest attack. Derived from the countermeasure evaluation, the best filter to confront the threat models is the robust regression using the least absolute residual computing method.

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Voltage Glitch Attacks on Mixed-Signal Systems

Cited by 21 publications

References 19 publications

A Review on Evaluation and Configuration of Fault Injection Attack Instruments to Design Attack Resistant MCU-Based IoT Applications

A Review on Evaluation and Configuration of Fault Injection Attack Instruments to Design Attack Resistant MCU-Based IoT Applications

Security Interrogation and Defense for SAR Analog to Digital Converter

Mixed-Signal Hardware Security: Attacks and Countermeasures for ΔΣ ADC

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