Voltage mirror circuit by carbon nanotube field effect transistors for mirroring dynamic random access memories in multiple‐valued logic and fuzzy logic

Jasemi, Masoomeh; Mirzaee, Reza Faghih; Navi, Keivan; Bagherzadeh, Nader

doi:10.1049/iet-cds.2014.0295

Cited by 9 publications

(11 citation statements)

References 53 publications

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“…CNTs are essentially a single sheet of graphene rolled into a cylinder, with diameters ranging from 0.6 to 5 nm. Their highest room-temperature mobility and scattering velocity make them suitable candidates for nano-electronics, which based on the chiral vector can be configured as follows [18][19][20][21]:…”

Section: Carbon Nanotube Field Effect Transistormentioning

confidence: 99%

Heterogeneous energy‐sparing reconfigurable logic: spin‐based storage and CNFET‐based multiplexing

Krishna

Roohi

Zand

et al. 2017

IET Circuits, Devices & Systems

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Field programmable gate array (FPGA) attributes of logic configurability, bitstream storage, and dynamic signal routing can be realised by leveraging the complementary benefits of emerging devices with complementary metal oxide semiconductor (CMOS)-based devices. A novel carbon/magnet lookup table (CM-LUT) is developed and evaluated by trading off a range of mixed heterogeneous technologies to balance energy, delay, and reliability attributes. Herein, magnetic spintronic devices are employed in the configuration memory to contribute non-volatility and high scalability. Meanwhile, carbon nanotube field-effect transistors (CNFETs) provide desirable conductivity, low delay, and low power consumption. The proposed CM-LUT offers ultra-low power and high-speed operation while maintaining high endurance re-programmability with increased radiationinduced soft-error immunity. The proposed four-input one-output CM-LUT utilises 41 CNFETs and 20 magnetic tunnel junctions for read operations and 35 CNFET to perform write operations. Results indicate that CM-LUT achieves an average four-fold energy reduction, eight-fold faster circuit operation and 9.3% reconfiguration power delay product improvement in comparison with spin-based look-up tables. Finally, additional hybrid technology designs are considered to balance performance with the demands of energy consumption for near-threshold operation.

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Section: Carbon Nanotube Field Effect Transistormentioning

confidence: 99%

Heterogeneous energy‐sparing reconfigurable logic: spin‐based storage and CNFET‐based multiplexing

Krishna

Roohi

Zand

et al. 2017

IET Circuits, Devices & Systems

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“…The chirality of a CNT is related to its diameter. Commonlyused [7,8] chirality vectors (19,0), (13,0) and (10,0) lead to diameters of 1.487, 1.018 and 0.783 nm, respectively. The diameter (D CNT ) and the threshold voltage (V th ) are related by V th = 0.35/D CNT .…”

Section: Terminologymentioning

confidence: 99%

“…Several designs for single ternary digit (trit) addition have been proposed [6][7][8][9][10][11][12]. Recently, a voltage mirror circuit in CNTFET has also been reported [13]. However, low-delay and low-power designs for multi-trit addition appear to be scarce.…”

Section: Introductionmentioning

confidence: 99%

Carbon nanotube FET‐based low‐delay and low‐power multi‐digit adder designs

Srinivasu

Sridharan

2016

IET Circuits, Devices & Systems

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Several field-effect transistor (FET)-based device technologies are emerging as powerful alternatives to the classical metal oxide semiconductor FET (MOSFET) for computing applications. The focus of this study is on arithmetic circuit design in carbon nanotube FET (CNTFET) technology. In particular, the authors develop low-delay and low-power multi-ternary digit CNTFET-based adder designs. The proposed designs are based on unary operators of multi-valued logic. Efficient designs for primitives such as ternary half-adder (HA) and full-adder are developed and they are used to obtain low-complexity multi-digit adders based on the notions of conditional sum and carry lookahead. Extensive HSPICE simulations reveal that the powerdelay product of the proposed CNTFET-based HA and full-adder are roughly 20 and 50%, respectively, of that of recent designs. Further, the proposed CNTFET-based conditional sum adder has a power-delay product of approximately 27% of that of a multitrit design derived from a recent single-trit adder design (for a load capacitance of 2 fF). Moreover, the proposed CNTFET-based carry lookahead adder has low delay in comparison with the conditional sum strategy for different supply voltages. Studies on robustness of the designs are also reported. To our knowledge, there are no prior low-delay and low-power CNTFET-based multi-trit adder designs. Detailed HSPICE simulations using the MOSFET-like CNTFET library described in [16] reveal that i. The worst-case delay of the proposed CNTFET-based HA is roughly (i) 50% and (ii) 31%, respectively, of the delay for the designs in [7, 8]. Further, the proposed design has a powerdelay product (PDP) of approximately (i) 21% and (ii) 13%, respectively, of the designs in [7, 8]. ii. The proposed CNTFET-based full-adder has a PDP of approximately 50% of that of the design in [11]. iii. The proposed CNTFET-based HA and full-adder designs are highly robust. iv. The proposed CNTFET-based CSA has a PDP of approximately (i) 27% and (ii) 18%, respectively, of the PDP of multi-trit designs based on the single-trit adders in [8, 11] (for a load capacitance of 2 fF). v. The proposed CNTFET-based carry lookahead adder (CLA) has a worst-case delay of approximately (i) 46% and (ii) 15%, respectively, of that of the proposed CSA and a multi-trit

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“…Thus, the integration of capacitor into the CNFET technology is not a matter of concern. Transistor sizing parameters for the VMs are exactly the same as what has been mentioned in [5]. Except the capacitor and VMs, the rest of the transistors have five CNTs with the diameter of 1.4877 nm as their channel.…”

Section: Proposed Fuzzy Srammentioning

confidence: 99%

Robust fuzzy SRAM for accurate and ultra‐low‐power MVL and fuzzy logic applications

et al. 2016

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A fuzzy static RAM (SRAM) is proposed, which is applicable in fuzzy logic and many multiple-valued logic (MVL) applications. The new structure is basically an extension to the binary SRAM cell. Two crosscoupled voltage mirror circuits are used to be able to hold an arbitrary voltage value. The proposed design forms a robust and reliable structure, which is capable of operating with more than 95% accuracy in spite of imperfect fabrication of carbon nanotube FETs. Another exceptional advantage is its ultra-low-power consumption in MVL environments. It consumes 38.7 and 99% less static power compared with the SRAMs with regular ternary and quaternary components, respectively.

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Voltage mirror circuit by carbon nanotube field effect transistors for mirroring dynamic random access memories in multiple‐valued logic and fuzzy logic

Cited by 9 publications

References 53 publications

Heterogeneous energy‐sparing reconfigurable logic: spin‐based storage and CNFET‐based multiplexing

Heterogeneous energy‐sparing reconfigurable logic: spin‐based storage and CNFET‐based multiplexing

Carbon nanotube FET‐based low‐delay and low‐power multi‐digit adder designs

Robust fuzzy SRAM for accurate and ultra‐low‐power MVL and fuzzy logic applications

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