WCET-aware static locking of instruction caches

Plazar, Sascha; Kleinsorge, Jan C.; Marwedel, Peter; Falk, Heiko

doi:10.1145/2259016.2259023

Cited by 36 publications

(28 citation statements)

References 9 publications

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“…There are approaches for reducing the WCET [26], [27], but these are static. Thus, the contents in the SPM are fixed before execution and no changes occur during runtime.…”

Section: Related Workmentioning

confidence: 99%

WCET-aware dynamic code management on scratchpads for Software-Managed Multicores

Kim

Broman

Cai

et al. 2014

2014 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS)

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Abstract-Software Managed Multicore (SMM) architectures have advantageous scalability, power efficiency, and predictability characteristics, making SMM particularly promising for real-time systems. In SMM architectures, each core can only access its scratchpad memory (SPM); any access to main memory is done explicitly by DMA instructions. As a consequence, dynamic code management techniques are essential for loading program code from the main memory to SPM. Current state-of-the-art dynamic code management techniques for SMM architectures are, however, optimized for average-case execution time, not worst-case execution time (WCET), which is vital for hard real-time systems. In this paper, we present two novel WCET-aware dynamic SPM code management techniques for SMM architectures. The first technique is optimal and based on integer linear programming (ILP), whereas the second technique is a heuristic that is suboptimal, but scalable. Experimental results with benchmarks from Mälardalen WCET suite and MiBench suite show that our ILP solution can reduce the WCET estimates up to 80% compared to previous techniques. Furthermore, our heuristic can, for most benchmarks, find the same optimal mappings within one second on a 2GHz dual core machine.

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“…There are approaches for reducing the WCET [26], [27], but these are static. Thus, the contents in the SPM are fixed before execution and no changes occur during runtime.…”

Section: Related Workmentioning

confidence: 99%

WCET-aware dynamic code management on scratchpads for Software-Managed Multicores

Kim

Broman

Cai

et al. 2014

2014 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS)

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“…By carefully selecting the memory blocks for locking, WCET can be improved. There exist two locking mechanisms, static cache locking [9,19,22,16] and dynamic cache locking [5,26]. However, all of the above techniques lock the entire cache.…”

Section: Related Workmentioning

confidence: 99%

“…We compare m with the candidate memory block mblk that currently has the most utilization gain (line 20). If m has more utilization gain than mblk, we update mblk with m (line [21][22]. We continue to do this until all candidate memory blocks are considered.…”

Section: C2 Utilization Optimization Algorithmmentioning

confidence: 99%

Integrated instruction cache analysis and locking in multitasking real-time systems

Ding

Liang

Mitra

2013

Proceedings of the 50th Annual Design Automation Conference

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Cache locking improves timing predictability at the cost of performance. We explore a novel approach that opportunistically employs both cache analysis and locking to enhance schedulability in preemptive multi-tasking real-time systems. The cache is spatially shared among the tasks by statically locking a portion of the cache per task. To overcome the issue of limited cache space per task, we keep a portion of the cache unlocked and let all the tasks use it through time-multiplexing. Compared to locking the entire cache for each task during execution, our approach obviates the cost of reloading locked blocks at preemption. But we require static cache analysis for WCET estimation and cache related preemption delay (CRPD) analysis of the unlocked cache space. We design an algorithm to make appropriate locking decisions through accurate costbenefit analysis. Experimental results show that our integrated approach leads to substantially improved schedulability results compared to cache analysis and cache locking employed individually.

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“…Most cache locking techniques aimed at improving the WCET employ static cache locking [9], [15], [18], [7]. Static locking loads and locks the memory blocks at program startup, and the locked content remains unchanged throughout the program execution.…”

Section: Introductionmentioning

confidence: 99%

“…Static locking loads and locks the memory blocks at program startup, and the locked content remains unchanged throughout the program execution. Most static locking techniques use full cache locking [9], [15], [18] where the entire cache is locked. However, full locking does not allow the unlocked memory blocks to use the cache and exploit their locality, and thus may introduce negative impact on the overall WCET.…”

Section: Introductionmentioning

confidence: 99%

WCET-Centric dynamic instruction cache locking

Ding¹,

Liang²,

Mitra³

2014

Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE), 2014

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Abstract-Cache locking is an effective technique to improve timing predictability in real-time systems. In static cache locking, the locked memory blocks remain unchanged throughout the program execution. Thus static locking may not be effective for large programs where multiple memory blocks are competing for few cache lines available for locking. In comparison, dynamic cache locking overcomes cache space limitation through timemultiplexing of locked memory blocks. Prior dynamic locking technique partitions the program into regions and takes independent locking decisions for each region. We propose a flexible loopbased dynamic cache locking approach. We not only select the memory blocks to be locked but also the locking points (e.g., loop level). We judiciously allow memory blocks from the same loop to be locked at different program points for WCET improvement. We design a constraint-based approach that incorporates a global view to decide on the number of locking slots at each loop entry point and then select the memory blocks to be locked for each loop. Experimental evaluation shows that our dynamic cache locking approach achieves substantial improvement of WCET compared to prior techniques.

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WCET-aware static locking of instruction caches

Cited by 36 publications

References 9 publications

WCET-aware dynamic code management on scratchpads for Software-Managed Multicores

WCET-aware dynamic code management on scratchpads for Software-Managed Multicores

Integrated instruction cache analysis and locking in multitasking real-time systems

WCET-Centric dynamic instruction cache locking

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