Why‐ and how‐ to integrate Verilog‐A compact models in SPICE simulators

Chalkiadaki, Maria-Anna; Valla, Cédric; Poullet, F.; Bucher, Matthias

doi:10.1002/cta.1833

Cited by 15 publications

(8 citation statements)

References 16 publications

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“…We shall apply similar notation to the partial derivative of F 2 (•) in the sequel. Rearrangement of (8) gives…”

Section: State-based Mna Stamping For the Memristormentioning

confidence: 99%

“…The second approach is the currently prevailing technology in the semi-conductor industry for releasing the latest CMOS (FinFET) model and integration into a standard SPICE simulator. In contrast, the first implementation method is more behavioral oriented, and according to Chalkiadaki et al [8], it simulation performance for large-scale circuit could be less competitive.…”

Section: Comparison To Verilog-a Model Implementationmentioning

confidence: 99%

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A Native SPICE Implementation of Memristor Models for Simulation of Neuromorphic Analog Signal Processing Circuits

ShiGuoyong

2021

ACM Trans. Des. Autom. Electron. Syst.

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Since the memristor emerged as a programmable analog storage device, it has stimulated research on the design of analog/mixed-signal circuits with the memristor as the enabler of in-memory computation. Due to the difficulty in evaluating the circuit-level nonidealities of both memristors and CMOS devices, SPICE-accuracy simulation tools are necessary for perfecting the art of neuromorphic analog/mixed-signal circuit design. This article is dedicated to a native SPICE implementation of the memristor device models published in the open literature and develops case studies of applying such a circuit simulation with MOSFET models to study how device-level imperfections can make adversarial effects on the analog circuits that implement neuromorphic analog signal processing. Methods on memristor stamping in the framework of modified nodal analysis formulation are presented, and implementation results are reported. Furthermore, functional simulations on neuromorphic signal processing circuits including memristors and CMOS devices are carried out to validate the effectiveness of the native SPICE implementation of memristor models from the perspectives of simulation accuracy, efficiency, and convergence for large-scale simulation tasks.

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“…We shall apply similar notation to the partial derivative of F 2 (•) in the sequel. Rearrangement of (8) gives…”

Section: State-based Mna Stamping For the Memristormentioning

confidence: 99%

Section: Comparison To Verilog-a Model Implementationmentioning

confidence: 99%

A Native SPICE Implementation of Memristor Models for Simulation of Neuromorphic Analog Signal Processing Circuits

ShiGuoyong

2021

ACM Trans. Des. Autom. Electron. Syst.

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“…Overall, the model can be described as a robust set of equations that covers the complete electromechanical functionality of the switch. The Verilog-A language is a portable tool between circuit simulators that contains all the elements needed for this task, and thus it was used for the implementation of the model [29]. The model has been successfully validated against measurements and numerical simulations [28].…”

Section: Analytical Compact Model (Acm) Simulationmentioning

confidence: 99%

Nanoelectromechanical digital logic circuits using curved cantilever switches with amorphous-carbon-coated contacts

Ayala

Grogg

Bazigos

et al. 2015

Solid-State Electronics

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, M. et al. (2015) Nanoelectromechanical digital logic circuits using curved cantilever switches with amorphous-carbon-coated contacts Abstract Nanoelectromechanical (NEM) switches have the potential to complement or replace traditional CMOS transistors in the area of ultra-low-power digital electronics. This paper reports the demonstration of prototype circuits including the first 3-stage ring oscillator built using cell-level digital logic elements based on curved NEM switches. The ring oscillator core occupies an area of 30 µm × 10 µm using 6 NEM switches. Each NEM switch device has a footprint of 5 µm × 3 µm, an air gap of 60 nm and is coated with amorphous carbon (a-C) for reliable operation. The ring oscillator operates at a frequency of 6.7 MHz, and confirms the simulated inverter propagation delay of 25 ns. The successful fabrication and measurement of this demonstrator are a key milestone on the way towards an optimized, scaled technology with sub-nanosecond switching times, lower operating voltages and VLSI implementation.

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“…To aid the CM community, some companies (i.e. Cadence, Dolphin Integration ) make freely available the ADMS xml scripts that they wrote for their simulator interfaces.…”

Section: Adms: Automatic Device Model Synthesizermentioning

confidence: 99%

Open‐source circuit simulation tools for RF compact semiconductor device modelling

Grabinski¹,

Brinson

Nenzi

et al. 2014

Int J Numerical Modelling

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SUMMARYMOS-Modelle und Parameterextraktion Arbeitskreis (MOS-AK) is a European, independent compact modelling forum created by a group of engineers, researchers and compact modelling enthusiasts to promote advanced compact modelling techniques and model standardization using high-level behavioural modelling languages such as VHDL-AMS and Verilog-A. This invited paper summarizes recent MOS-AK open-source compact model standardization activities and presents advanced topics in metal-oxide-semiconductor field-effect transistor modelling, focusing in particular on analogue/radio frequency applications. The paper discusses links between compact models and design methodologies, finally introducing elements of compact model standardization. The opensource computer-aided design tools Qucs, QucsStudio and ngspice all support Verilog-A as a hardware description language for compact model standardization. Latter sections of this paper describe a Verilog-A implementation of the EKV3 MOS transistor model. Additionally, the simulated radio frequency model performance is evaluated and compared with experimental results for 90 nm CMOS technology.

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Why‐ and how‐ to integrate Verilog‐A compact models in SPICE simulators

Cited by 15 publications

References 16 publications

A Native SPICE Implementation of Memristor Models for Simulation of Neuromorphic Analog Signal Processing Circuits

A Native SPICE Implementation of Memristor Models for Simulation of Neuromorphic Analog Signal Processing Circuits

Nanoelectromechanical digital logic circuits using curved cantilever switches with amorphous-carbon-coated contacts

Open‐source circuit simulation tools for RF compact semiconductor device modelling

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