IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004.
DOI: 10.1109/iedm.2004.1419073
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Work function tuning through dopant scanning and related effects in Ni fully silicided gate for sub-45nm nodes CMOS

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Cited by 23 publications
(15 citation statements)
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“…An O 2 post-deposition anneal at 800°C was performed and a phosphorus-implanted polysilicon layer was deposited. Some samples were then totally siliciced with a two-step process (Nickel deposition then anneal) to form TOSI NiSi arsenic doped gates [1].…”
Section: Samples and Experimental Proceduresmentioning
confidence: 99%
“…An O 2 post-deposition anneal at 800°C was performed and a phosphorus-implanted polysilicon layer was deposited. Some samples were then totally siliciced with a two-step process (Nickel deposition then anneal) to form TOSI NiSi arsenic doped gates [1].…”
Section: Samples and Experimental Proceduresmentioning
confidence: 99%
“…1,2 While Hf-based insulators are widely recognized as the preferred high-k dielectrics, the choice of metal gates and their integration into CMOS is still under intensive investigation. [5][6][7] The metal layer contacting the dielectric, which will be referred to as functional metal layer, to some extent, screens the impact of layers on top, even if it is thin. 3 At first glance, the WF is simply determined by the properties of the metal gate material.…”
Section: Influence Of Metal Capping Layer On the Work Function Of Mo mentioning
confidence: 99%
“…6 Recently, co-implanted ͑As, P͒ dopants were found to have larger work function tuning than individual As or P in a NiSi FUSI gate. 10 In this letter, we investigated the enhanced work function tuning by coimplanting Sb with As and P. Nearly ideal NMOS work function was achieved using Sb/ As/ P preimplanted NiSi FUSI gate. Co-implantation of B with n-type dopant was also investigated and able to adjust work function in the entire Si band gap.…”
mentioning
confidence: 99%