In this work a combined experimental/numerical approach to describe the thermo-mechanical behavior of power devices under repetitive power pulsing is presented. Stress tests have been carried out on power DMOS implemented in Smart Power BCD technology with different Back-End Of Line (BEOL) schemes, including, for the first time, full Copper. Mechanical laboratory nano-indentation tests have been used to determine constituent properties of the metal layers. Thermo-mechanical 3D FEM modeling has been used to simulate a multi-cycle thermal loading of a whole power device with its package. Results from simulation have been qualitatively compared to experimental results. © 2013 IEEE

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This paper reviews the BCD technology roadmap and its evolution towards finer lithography features, wider voltage capability offer and the broadening variety of integrable components.The splitting of the roadmap into three main directions -high-voltage, high-power and high-densityand the different evolving criteria are discussed.The trend of more recent BCD versions to converge to technology platforms common to advanced CMOS processes, diversifying or simplifying the technology according to different application needs, the emerging and consolidation of new directions are presented.Examples of possible realizations in different application fields using the more suitable BCD approach are also proposed. BCD Roadmap differentiationBefore the advent of BCD technology, power ICs were realized using pure bipolar technologies (I2L for logic) that obtain very limited benefit in improving power device performance and increasing logic density as the lithography is scaled down.

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