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A proposed holistic approach to on-chip, off-chip, test, and package interconnections AIP Conf.This article presents the fabrication and the characteristics of 8 ϫ 64, parallel, self-actuated, and independently addressable scanning proximal probes with through-silicon via interconnection passing completely through a silicon wafer. The low-resistance highly doped polysilicon through-wafer electrical interconnects have been integrated with scanning proximal probes ͑SPPs͒ to enable back side contacts to the application-specific integrated circuit used as an atomic force microscope control circuitry. Every SPP sensor contains a deflection sensor, thermally driven bimetal ͑bimorph͒ actuator, and sharp silicon tip. Dry etching-based silicon on insulator three-dimensional-micromachining technique is employed by the creation of the through-silicon vias and the SPP arrays keeping fully complementary metal-oxide semiconductor compatible process regime. The application of the vertical interconnection technology in large-scale two-dimensional cantilever arrays with off-plane bent cantilevers over the chip's surface, in a combination with the flip-chip packaging technology allow simultaneous approach and parallel scanning of large areas in noncontact mode.