We propose carbon as new resistive memory material for non-volatile memories and compare three allotropes of carbon, namely carbon nanotubes, graphene-like conductive carbon and insulating carbon for their possible application as resistance-change material in high density non-volatile memories. Repetitive high-speed switching and the potential for multi-level programming have been successfully demonstrated.

The mechanisms of electromigration, i.e. mass transport induced by high electric current, were studied in thin AlSi1Cu0.5 interconnects using in situ experiments in a Scanning Electron Microscope (SEM). The influence of grain boundaries as important paths of diffusion could be shown because the initial grain structure was recorded in detail by an orientation mapping with high lateral resolution over the whole interconnect. That was done by the Electron Back Scatter Diffraction technique in the SEM. The role of grain boundaries with high misorientation angles and of large blocking grains was investigated in detail by comparison of the localised damages with the corresponding part of orientation map. The formation of fatal voids was found to take place at the end of a large blocking grain followed by a high angle grain boundary directed parallel to the current flow. Hillocks were seen to be formed at such grain boundary triple junctions where a high flux divergence occurs due to different misorientation angles of the joined grain boundaries, and due to their direction with respect to the current flow. Additionally an increased content of the alloying element Cu was found in some of the hillocks.

We present a 46nm 6F 2 buried word-line (bWL) DRAM technology, enabling the smallest cell size of 0.013um2 published to date. The TiN/ W buried word-line is built below the Si surface, forming a low resistive interconnect and the metal gate of the array transistors. We demonstrate high array device on-current, small parameter variability, high reliability and small parasitic capacitances, resulting in an excellent array performance. The array device can be scaled down to 30nm without compromising its performance.

Scanning thermal microscopy (SThM) enables thermal conductivity (λ) measurements with a lateral resolution down to a few tens of nanometers. The present work investigates ways to improve SThM images recorded with resistive probes. Probes based on resistance thermometry act both as a thermometer and as a Joule heated nanoscale heat source. The influence of amplitude and frequency of the applied heating voltage on the SThM image quality was systematically studied. To connect the investigated heating parameters to the temperature change at the apex of the SThM probe, electrical–thermal finite element simulations were performed. Image quality was assessed according to three criteria. The first criterion was the thermal contrast (thermal resolution) between materials of different λ’s. To convert measured SThM signals (in mV) into thermal resolution (in W m−1 K−1), reference measurements were performed by time-domain thermoreflectance, and an implicit calibration method was employed. The second criterion was the distortion of the thermal image by topography. To illustrate the image distortion, the standard deviation of the thermal trace-minus-retrace profile was taken, which could be reduced nearly ten times by changing the heating parameters of the used SThM setup. The third criterion was the spatial resolution of the thermal images. To assess the spatial resolution, gradients in the thermal signal at interfaces between materials were extracted from profiles through thermal images.

In this work the authors want to report some experiments concerning unpassivated Al interconnect lines of 8 and 1.4 microns width which have been damaged by in-situ electromigration in the SEM (temperature 230°C, current density 2 and 4×106 A/cm2, respectively). The wider line represents a polygrained structure with few blocking grains spanning the whole width, whereas the narrow line shows bamboo structure. Before electromigration, the local orientation and thus the position of all grain boundaries was mapped by EBSD technique along the entire interconnect line. During and after in-situ current loading in the SEM, the damaged sites were correlated with the grain boundary map to locate where the diffusion paths are situated most likely. It was found that not the deviation from <111> fibre texture, but the misorientation class of the grain boundaries is essential for the localization of the fatal defects.