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New generations of electronic chips bring with them the promise of more capacity, storage, and speed. They also bring new challenges to design, test and manufacturing. A look at a series of advanced test systems, how they were designed and why, sheds new light on this practical side of advanced technology. I lectronic chip technology is advancing at a rate that pushes existing tester technology to its limits. Projected product specifications, while promising greater speed and storage capacity, also threaten to drive current testers to the brink of obsolescence. In 1977, IBM announced the first advanced high-speed testers running at 100 MHz.' Today breakthroughs in memory capacity and chip operating speeds are almost commonplace. To meet the challenges posed by new generations of chip products, IBM decided to develop a new series of advanced test systems2 that would take advantage of the latest semiconductor and packaging technologies. The new test systems were to address three areas of concern that. we considered vital to upcoming product specifications: (1) test system timing accuracy; (2) test system speed, or its minimum test cycle; (3) test system 1/0 capability, or the number of pins it could handle.This effort, called the ATS project, was to be completed in three phases:The first phase, ATS-1, was to address the immediate needs of testing high-speed bipolar arrays with pin counts of approximately 100. This phase would also be used to prove out a new test system architecture. Phase two, ATS-2, would repackage the first system to yield a more reproducible and cost-effective tester that would be used for final test in a semiconductor manufacturing line. In this phase, the system's logic testing capabilities would be examined and improved. By the end of the third phase, ATS-3, a system would be developed and built that could test the full spectrum of chip products-arrays, logic, and logic with embedded arrays. Furthermore, the device under test,or DUT, inter-24 0740-7475/88/0400-24$1.000 1988 lEEE DESlGN & TEST OF COMPUTERS

The Interactive Circuit Design Program is a multi-purpose program implemented in APL.It features steady state (DC), frequency (AC), and transient (TR) analysis of linear and nonlinear circuits with arbitrary nonlinearities.Lossless coupled and uncoupled transmission lines in the DC, AC and TR modes can be analyzed in addition to inhomogeneous media in the DC and TR modes.A graphic interface allows users to plot outputs from TR or AC runs on a vector storage tube.The analytic techniques used include a modified nodal method of formulation, an APL-tailored parallel pivoting strategy variable order, variable step implicit integration scheme with an efficient integration strategy.

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