Genetic and simplex-downhill (SD) algorithms were used for the optimization of the electron-beam lithography (EBL) step in the fabrication of microwave electronic circuits. The definition of submicrometer structures involves complex exposure patterns that are cumbersome to determine experimentally and very difficult to optimize with linear search algorithms due to the high dimensionality of the search space. A SD algorithm was first used to solve the optimization problem. The large number of parameters and the complex topology of the search space proved too difficult for this algorithm, which could not yield satisfactory patterns. A hybrid approach using genetic algorithms (GAs) for global search, and a SD algorithm for further local optimization, was unable to drastically improve the structures optimized with GAs alone. A carefully studied fitness function was used. It contains mechanisms for reduced dependence on process tolerances. Several methods were studied for the selection, crossover, mutation, and reinsertion operators. The GA was used to predict scanning patterns for 100-nm T-gates and gate profiles with asymmetric recess and the structures were fabricated successfully. The simulation and optimization tool can help shorten response times to alterations of the EBL process by suppressing time-consuming experimental trial-and-error steps.

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In this paper, we present a monolithically integrated 3-stage low-noise amplifier working in the 4-12 GHz band. The circuit was fabricated on our in-house 0.2 ym InP HEMT process using coplanar waveguide technology. In the band of interest, the fabricated amplifier shows an average noise figure of 1.25 dB and an average gain of 28 dB with a gain ripple of *2 dB at room temperature. The total dc power consumption of the LNA is 41 mW.At a temperature of 10 K, an average gain of 27 cU3 and average noise temperature of 13 K was achieved, whereas the dc power consumption was reduced to 5.7 mW.