We introduce a specialized self-checking hardware journal being used as a centerpiece in our design strategy to build a processor tolerant to transient faults. Fault tolerance here relies on the use of error detection techniques in the processor core together with journalization and rollback execution to recover from erroneous situations. Effective rollback recovery is possible thanks to using a hardware journal and chosing a stack computing architecture for the processor core instead of the usual RISC or CISC. The main objective of the journalization and the hardware self-checking journal is to prevent data not yet validated to be sent to the main memory, and allow to fast rollback execution on faulty situations. The main memory, supposed to be fault secure in our model, only contains valid (uncorrupted) data obtained from fault-free computations. Error control coding techniques are used both in the processor core to detect errors and in the HW journal to protect the temporarily stored data from possible changes induced by transient faults. Implementation results on an FPGA of the Altera Stratix-II family show clearly the relevance of the approach, both in terms of performance/area tradeoff and fault tolerance effectiveness, even for high error rates.
Modems and other network interfaces are critical devices in a network infrastructure. While software modems would be the ideal solution for flexibility and low COL, they miss the speed performance requirement. On the other hand. the usual hardware specific approach is not adapted to the fast evolution of protocols in modern multimedia network applications, in which very high data rates, flexibility, reliability and law cost designs are the target keywords.Designing a new processor architechlre based on a pseudosystolic MIMD approach is a promising road to explore in order to find an effective trade-off between all these requirements. The aim of this paper is to present a methodology to design such a complex and specific device and to introduce an useful set of CAD (Computer Aided Design) tools
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