Currently, there is less research on how to improve the efficiency of the application of computer graphics technology in the creation of public sculpture. Therefore, this paper will focus on how computer graphics algorithms can enable systems for the creation of public sculpture with the intervention of computer graphics technology to create more accurate and completed works of public sculpture. It will explore and analyze how computer image algorithms can help creators apply computer image technology to finish complete and accurate public sculptures, and individual studies, computer imagery, and model analysis are also used. In systems for the creation of public sculpture, the point cloud data of the model is obtained through 3D laser scanning technology; then the algorithm of the point cloud model is integrated and the Statistical Outlier Removal algorithm of the point cloud model intervention is processed. By this way, the point cloud model of the work is optimized, and then a more completed and accurate public sculpture work can be produced by 3D sculpting or 3D printing. The research shows that, in the creation of public sculptures with the intervention of computer graphics technology, the computer graphics algorithm acquires the basis of the high-definition public sculpture data model. The computer graphics algorithm improves the accuracy and completeness of the creator using computer graphics technology; it is also the key to transform the accurate enlargement and transformation of the sculptural model into the actual sculptural work.

Pickup effect for 5V NMOS and 18V lateral double-diffused NMOS under electrostatic discharge (ESD) stress is investigated and characterised by a transmission line pulse test system in a standard 0.5 mm 5V/ 18V CDMOS process, respectively. Experimental results show that 5V low-voltage multi-fingered NMOS devices cannot be turned-on uniformly with more added inner pickups and thus the ESD robustness degrades. For 18V high-voltage multi-fingered LDNMOS structures, it is critical to merge all pickups with the P-well guard-ring of the device to achieve uniform current conduction and better ESD performance.Introduction: Electrostatic discharge (ESD) damage to integrated circuits is more severe than ever before as CMOS technology advances. MOS based ESD devices are still one of the best candidates for most ICs owing to easy implementation and dual ESD conduction characteristics. However, there is an intrinsic disadvantage of non-uniform current conduction in multi-fingered MOS devices under ESD stress conditions. Methods like extending the drain or adding an additional mask called salicide block (SAB/RPO) [1] can be used to increase the ballasting resistance and make the current flow more evenly in the unit-finger width. The layout technique of inserting inner pickups in multi-fingered MOS devices to ensure equal base resistance for all the parasitic BJTs was reported more than decade ago [2, 3]. However, Ker found that pickups can directly affect the performance of ESD devices in the other way in some 0.18 mm and 0.13 mm salicide CMOS processes [4,5]. Lee found that a small base resistance of the parasitic BJT in high-voltage multi-fingered LDMOS structures would cause a current crowding effect or current non-uniformity between fingers and thus degrade the overall ESD performance of the device [6]. In this Letter, the ESD performance with a different number of the pickups in multi-fingered 5V NMOS and 18V LDNMOS devices fabricated in 0.5 mm 5V/18V CDMOS processes is studied.

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