The computer graphics system performance is increasing faster than any other computing application. Algorithms for line clipping against convex polygons and lines have been studied for a long time and many research papers have been published so far. In spite of the latest graphical hardware development and significant increase of performance, the clipping is still a bottleneck of any graphical system. Therefore, its implementation in hardware is essential for real time applications. In this paper clipping operation is discussed and a hardware implementation of the line clipping algorithm is presented and finally formulated and tested using Field Programmable Gate Arrays (FPGA). The designed hardware unit consists of two parts: the first is positional code generator unit and the second is the clipping unit. Finally it is worth mentioning that the designed unit is capable of clipping (232524) line segments per second.

One of the main effective means for communication is the picture. Computer graphic is an exiting growing field for visual communication. Nowadays computer graphic finds roots in diverse areas of application such as education, research, medicine, training, business, advertisement, and entertainment. Some of the most sophisticated computer graphics systems are those being used for producing video images in real time. This requires downloading repeatable tasks on the hardware [1][2].

The computer graphics system performance is increasing faster than any other computing application. The Geometric transformations and animation are one of the most important principle of the interactive computer graphics which are essential for modeling and viewing. This paper tends to construct a general form of matrix representation of the geometric transformations and implement it using Field Programmable Gate Array (FPGA). In addition to that the sine and cosine function evaluation is done using two techniques, the lookup table method and CORDIC algorithm.