We present a very simple technique to implement the first integrator of a continuous-time delta sigma modulator (CT-DSM). In the approach, the CT-DSM is preceded by a pulse-width modulator to convert the input signal to a pseudo-digital continuous time waveform. As a result, the first integrator of the DSM can be implemented with a capacitor and a switched current source, with inherent linearity. To illustrate the concept, it has been applied to the design of a 2nd order CT-DSM in 65nm CMOS technology. Introduction:Recently, various A/D conversion techniques that employ some kind of Pulse Width Modulation (PWM) have been presented [1,2,3]. Such a PWM converts a baseband signal into a two-level continuous time waveform. Here, the information is stored in the transitions of this 2-level waveform. If properly designed, no information is lost in this process. The two-level signal that comes out of the PWM can be easily processed by other circuit blocks. This way, a PWM is sometimes used in front of other blocks in the system's signal path. This technique is referred to as PWM pre-coding. In prior work, PWM pre-coding has been used to linearize a VCO-based ADC [1]. Alternatively, in [2] a time-to-digital converter was combined with a PWM pre-coding to convert the PWM signal into the digital domain. The former approach [1] achieves a 1st order quantization noise shaping, while the latter [2] exhibits no noise shaping at all.In this letter we present a new method for utilizing PWM pre-coding in the design of an ADC. In this work, the PWM is followed by a ContinuousTime Delta-Sigma modulator (CT-DSM) which, in contrast with previous works, can have quantization noise-shaping of any arbitrary order.