The influence of a strong magnetic field (up to 12 T), parallel to the Si-SiO2 interface on the injection of hot electrons from Si into SiO2, has been measured in the case where the heating electric field is uniform and normal to the interface. The experimental results show that the influence of the magnetic field can be either an increase or a decrease of the injection probability depending on the type of test device used. These results are compared to a numerical simulation based on the hypothesis that injected electrons are in majority ballistic (‘‘lucky’’) electrons. It is shown that a possible interpretation of the experimental results can be found with this model by taking into account the influence of interface roughness on the escape conditions of hot electrons. Numerical results based on a simple model are given that show for the first time that interface roughness may be an important factor to consider in the study of hot-electron injection physics.
This paper presents for the first time a fully integrated galvanic isolation interface in a GaN technology. It is based on planar micro-antennas and chip-to-chip communication with an on-off keying-modulated RF carrier. This approach can achieve high isolation rating and high common-mode transient immunity by properly setting the distance between chips. The interface provides the isolation channel for a main driver/power switch and the one for the control feedback of the dc-dc converter providing the isolated power supply. Driver and power control channels adopt an RF carrier of 2 GHz and 1.2 GHz, which are modulated by a pulse width modulated signal of 2 MHz and 0.5 MHz, respectively. The interface includes a continuously operating offset compensation approach, which overcomes not only the strong variations due to the large process tolerances of the GaN technology, but also offset drifts due to temperature variations. An accurate pulse width modulated signal with a large duty cycle variation in both channels was achieved. The isolation interface adopts a 6-V power supply, which delivers a quiescent current of 6.3 mA and 7.5 mA to the driver and power control channels, respectively, assuming a signal with a duty cycle of 50%.
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