Semiconductor manufacturing has been outsourced to un-trusted regions due to globalization. The complex multistep fabrication of micro-scale integrated circuits (ICs) and the tedious assembly of macro-scale Printed Circuit Boards (PCBs) are vulnerable to malicious attacks from design to final delivery. PCBs provide the functional connections of Integrated Circuits (ICs), sensors, power supplies, etc. of many critical electronic systems for consumers, corporations, and governments. The feature sizes of PCB signal traces in 2D and vias in 3D are an order of magnitude larger than IC devices, and are thereby more vulnerable to non-destructive attacks such as X-ray or probing. Active and passive countermeasures have been successfully developed for IC devices, however PCBs devices are difficult to wholly secure from all attacks. Passive countermeasures for X-ray attacks using high-z materials to block and scatter X-rays are effective, but there is a lack of active and passive countermeasures for PCB. In this paper, a framework for passively obfuscating a PCB's critical connections between components, such as ICs, from non-destructive attacks is demonstrated. This framework can be further extended to incorporate active countermeasures in future work. A proof of concept for a PCB electronic design automation (EDA) tool which combines the small features of micro electro-mechanical systems (MEMS), simulation of X-ray, and 3D PCB Manufacturing to iteratively optimize PCB design to thwart reverse engineering and probing attacks. Index Terms—Additive Manufacturing, MEMS, Hardware Assurance, Physical Inspection, Non-Destructive Technology

Interposers play an important role in 2.5D and 3D packages, routing power and communication signals between dies while maintaining electrical contact with I/O pins. This role and their relatively simple construction makes interposers a target for malicious attacks. In this article, the authors assess the vulnerabilities inherent in the fabrication of interposers and describe various types of optical attacks along with practical countermeasures.

The chips used in modern electronic devices are mainly manufactured and packaged by Outsourced Semiconductor Assembly and Test (OSAT) facilities and are potentially vulnerable to hardware attacks. Due to the complexity of the global supply chain, it is difficult to track the full fabrication process by the foundries or the intellectual property (IP) owners. Additionally, the design for fabricating and packaging the chip made by IP owners remains the same and visible throughout the process. Hence, this design can be seen by every entity in the supply chain using physical inspection techniques, making it vulnerable if any adversaries are present in the supply chain. Security threats such as IP piracy, overbuilding, reverse engineering, and counterfeiting are thus possible by potential adversaries in the supply chain. These attacks have become an increasing concern in the world of trusted microelectronics as supply chain globalization continues to develop. Several security methods have already been developed to protect and detect such threats until they become embedded into sensitive systems, such as logic locking, obfuscating, physically unclonable functions (PUF), and hardware metering. However, these existing prevention methods have their limitations or are not applicable to all devices. In general, only a few existing methods make use of the inherent characteristics of electronic devices and materials to provide reliable security. Hence, novel security and assurance strategies with minimal changes or modifications in the fabrication of the system circuit are urgently required. This paper proposes a novel technique of obfuscation and locking using a reconfigurable nano-electromechanical system (NEMS) based advanced package throughout the supply chain. Using this novel technique, the netlist/golden design for heterogeneously integrated devices will be hidden from malicious adversaries, and the IP designer will have control of its design until it reaches the end-user.

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The inverted orientation of a flip-chip packaged die makes it vulnerable to optical attacks from the backside. This article discusses the nature of that vulnerability, assesses the threats posed by optical inspection tools and techniques, and provides insights on effective countermeasures.