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We have been developing monolithic active pixel sensors series, named "XRPIX," based on the silicon-on-insulator (SOI) pixel technology, for future X-ray astronomical satellites. The XRPIX series offers high coincidence time resolution (∼1 µs), superior readout time (∼10 µs), and a wide energy range (0.5-40 keV). In the previous study, we successfully demonstrated X-ray detection by event-driven readout of XRPIX2b. We here report recent improvements in spectroscopic performance. We successfully increased the gain and reduced the readout noise in XRPIX2b by decreasing the parasitic capacitance of the sense-node originated in the buried p-well (BPW). On the other hand, we found significant tail structures in the spectral response due to the loss of the charge collection efficiency when a small BPW is employed. Thus, we increased the gain in XRPIX3b by introducing in-pixel charge sensitive amplifiers instead of having even smaller BPW. We finally achieved the readout noise of 35 e − (rms) and the energy resolution of 320 eV (FWHM) at 6 keV without significant loss of the charge collection efficiency.

This paper presents a novel full-depletion Si X-ray detector based on silicon-on-insulator pixel (SOIPIX) technology using a pinned depleted diode structure, named the SOIPIX-PDD. The SOIPIX-PDD greatly reduces stray capacitance at the charge sensing node, the dark current of the detector, and capacitive coupling between the sensing node and SOI circuits. These features of the SOIPIX-PDD lead to low read noise, resulting high X-ray energy resolution and stable operation of the pixel. The back-gate surface pinning structure using neutralized p-well at the back-gate surface and depleted n-well underneath the p-well for all the pixel area other than the charge sensing node is also essential for preventing hole injection from the p-well by making the potential barrier to hole, reducing dark current from the Si-SiO2 interface and creating lateral drift field to gather signal electrons in the pixel area into the small charge sensing node. A prototype chip using 0.2 μm SOI technology shows very low readout noise of 11.0 e−rms, low dark current density of 56 pA/cm2 at −35 °C and the energy resolution of 200 eV(FWHM) at 5.9 keV and 280 eV (FWHM) at 13.95 keV.